This is an automated email from Gerrit.
"Philip Kirkpatrick <p.kirkpatr...@reflexaerospace.com>" just uploaded a new
patch set to Gerrit, which you can find at
https://review.openocd.org/c/openocd/+/7682
-- gerrit
commit d3eaecfec955bb091195787d8cb13f3cc97e5aec
Author: Phil Kirkpatrick <p.kirkpatr...@reflexaerospace.com>
Date: Tue May 9 11:04:24 2023 +0200
tcl/target: Add support for TMS570LC43xx
Added support for TMS570LC43xx series parts. This uses the pre-existing
ti_tms570.cfg parent config. In ti_tms570.cfg, dbgbase was changed.
Note 1: Based on the following TI E2E post, the previous dbgbase was wrong
and the new value isn't due to a difference in parts.
https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1106954/tms570ls3137-debugging-with-openocd
Note 2: Both the previous dbgbase and the one suggested in the TI E2E post
have the 2 LSB set. In the current version of OpenOCD, this will cause
cortex_a_read_cpu_memory_fast and cortex_a_write_cpu_memory_fast to fail
due to an alignment checks in
mem_ap_<read/write>_buf_noincr()->mem_ap_<read/write>().
In all other uses of dbgbase for arm cortex parts, the 2 LSB are masked
and ignored.
Change-Id: Ic936722e5a4cfc7161b0df1fe3325ee12fd901c6
Signed-off-by: Phil Kirkpatrick <p.kirkpatr...@reflexaerospace.com>
diff --git a/tcl/target/ti_tms570.cfg b/tcl/target/ti_tms570.cfg
index 213fb094b9..1dbc26f7c7 100644
--- a/tcl/target/ti_tms570.cfg
+++ b/tcl/target/ti_tms570.cfg
@@ -60,7 +60,7 @@ dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
# Cortex-R4 target
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME cortex_r4 -endian $_ENDIAN \
- -dap $_CHIPNAME.dap -coreid 0 -dbgbase 0x00001003
+ -dap $_CHIPNAME.dap -coreid 0 -dbgbase 0x80001000
# TMS570 uses quirky BE-32 mode
$_CHIPNAME.dap ti_be_32_quirks 1
diff --git a/tcl/target/ti_tms570lc43xxA.cfg b/tcl/target/ti_tms570lc43xxA.cfg
new file mode 100644
index 0000000000..495d66648e
--- /dev/null
+++ b/tcl/target/ti_tms570lc43xxA.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# For rev, check printed part number on IC for TMS5704357<X>, where <X> is the
rev and is A or B
+
+# TMS570LC4357 - Silicon Rev A
+set DAP_TAPID 0x0B95A02F
+set JRC_TAPID 0x0B95A02F
+
+# TMS570LC4357 - Silicon Rev B
+#set DAP_TAPID 0x1B95A02F
+#set JRC_TAPID 0x1B95A02F
+
+source [find target/ti_tms570.cfg]
diff --git a/tcl/target/ti_tms570lc43xxB.cfg b/tcl/target/ti_tms570lc43xxB.cfg
new file mode 100644
index 0000000000..e04343284b
--- /dev/null
+++ b/tcl/target/ti_tms570lc43xxB.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# For rev, check printed part number on IC for TMS5704357<X>, where <X> is the
rev and is A or B
+
+# TMS570LC4357 - Silicon Rev A
+#set DAP_TAPID 0x0B95A02F
+#set JRC_TAPID 0x0B95A02F
+
+# TMS570LC4357 - Silicon Rev B
+set DAP_TAPID 0x1B95A02F
+set JRC_TAPID 0x1B95A02F
+
+source [find target/ti_tms570.cfg]
--
