This is an automated email from Gerrit.
"Jacek Wuwer <jacek...@gmail.com>" just uploaded a new patch set to Gerrit,
which you can find at https://review.openocd.org/c/openocd/+/7723
-- gerrit
commit 3d2d426a26e912d640a65bf9620d38d81eed2ea8
Author: Jacek Wuwer <jacek...@gmail.com>
Date: Mon May 29 19:00:27 2023 +0200
jtag/vdebug: adding xtensa config
This change adds the extensa sample target and board configurations.
it removes the obsoleted vd_xtensa_jtag.cfg from targets.
Change-Id: I9d4d25abde46c0b15e5211a973012447872cb405
Signed-off-by: Jacek Wuwer <jacek...@gmail.com>
diff --git a/tcl/board/vd_xt8_jtag.cfg b/tcl/board/vd_xt8_jtag.cfg
new file mode 100644
index 0000000000..867b9e76e5
--- /dev/null
+++ b/tcl/board/vd_xt8_jtag.cfg
@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# Cadence virtual debug interface
+# Xtensa xt8 through JTAG
+
+source [find interface/vdebug.cfg]
+
+set CHIPNAME xt8
+set CPUTAPID 0x120034e5
+
+# vdebug select transport
+transport select jtag
+
+# JTAG reset config, frequency and reset delay
+reset_config trst_and_srst
+adapter speed 50000
+adapter srst delay 5
+
+# BFM hierarchical path and input clk period
+vdebug bfm_path Testbench.u_vd_jtag_bfm 10ns
+
+# DMA Memories to access backdoor, the values come from generated
xtensa-core-xt8.cfg
+#vdebug mem_path Testbench.Xtsubsystem.Core0.iram0.iram0.mem.dataArray
0x40000000 0x100000
+#vdebug mem_path Testbench.Xtsubsystem.Core0.dram0.dram0.mem.dataArray
0x3ff00000 0x40000
+
+# Create Xtensa target first
+source [find target/xtensa.cfg]
+# Generate [xtensa-core-XXX.cfg] via "xt-gdb --dump-oocd-config"
+source [find target/xtensa-core-xt8.cfg]
diff --git a/tcl/target/vd_xtensa_jtag.cfg b/tcl/target/vd_xtensa_jtag.cfg
deleted file mode 100644
index 88f5bcc076..0000000000
--- a/tcl/target/vd_xtensa_jtag.cfg
+++ /dev/null
@@ -1,27 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-or-later
-# Cadence virtual debug interface
-# for Palladium emulation systems
-#
-
-# TODO: Enable backdoor memory access
-# set _MEMSTART 0x00000000
-# set _MEMSIZE 0x100000
-
-# BFM hierarchical path and input clk period
-vdebug bfm_path dut_top.JTAG 10ns
-# DMA Memories to access backdoor (up to 4)
-# vdebug mem_path tbench.u_mcu.u_sys.u_itcm_ram.Mem $_MEMSTART $_MEMSIZE
-
-# Create Xtensa target first
-source [find target/xtensa.cfg]
-
-# Configure Xtensa core parameters next
-# Generate [xtensa-core-XXX.cfg] via "xt-gdb --dump-oocd-config"
-
-# register target
-proc vdebug_examine_end {} {
-# vdebug register_target
-}
-
-# Default hooks
-$_TARGETNAME configure -event examine-end { vdebug_examine_end }
diff --git a/tcl/target/xtensa-core-xt8.cfg b/tcl/target/xtensa-core-xt8.cfg
new file mode 100644
index 0000000000..e544d7854f
--- /dev/null
+++ b/tcl/target/xtensa-core-xt8.cfg
@@ -0,0 +1,166 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+# OpenOCD configuration file for Xtensa xt8 target
+
+# Core definition and ABI
+xtensa xtdef LX
+xtensa xtopt arnum 32
+xtensa xtopt windowed 1
+
+
+# Exception/Interrupt Options
+xtensa xtopt exceptions 1
+xtensa xtopt hipriints 1
+xtensa xtopt intlevels 3
+xtensa xtopt excmlevel 1
+
+
+# Cache Options
+xtensa xtmem icache 16 1024 1
+xtensa xtmem dcache 16 1024 1 1
+
+
+# Memory Options
+xtensa xtmem iram 0x40000000 1048576
+xtensa xtmem dram 0x3ff00000 262144
+xtensa xtmem srom 0x50000000 131072
+xtensa xtmem sram 0x60000000 4194304
+
+
+# Memory Protection/Translation Options
+
+
+# Debug Options
+xtensa xtopt debuglevel 3
+xtensa xtopt ibreaknum 2
+xtensa xtopt dbreaknum 2
+
+
+# Core Registers
+xtensa xtregs 127
+xtensa xtreg a0 0x0000
+xtensa xtreg a1 0x0001
+xtensa xtreg a2 0x0002
+xtensa xtreg a3 0x0003
+xtensa xtreg a4 0x0004
+xtensa xtreg a5 0x0005
+xtensa xtreg a6 0x0006
+xtensa xtreg a7 0x0007
+xtensa xtreg a8 0x0008
+xtensa xtreg a9 0x0009
+xtensa xtreg a10 0x000a
+xtensa xtreg a11 0x000b
+xtensa xtreg a12 0x000c
+xtensa xtreg a13 0x000d
+xtensa xtreg a14 0x000e
+xtensa xtreg a15 0x000f
+xtensa xtreg pc 0x0020
+xtensa xtreg ar0 0x0100
+xtensa xtreg ar1 0x0101
+xtensa xtreg ar2 0x0102
+xtensa xtreg ar3 0x0103
+xtensa xtreg ar4 0x0104
+xtensa xtreg ar5 0x0105
+xtensa xtreg ar6 0x0106
+xtensa xtreg ar7 0x0107
+xtensa xtreg ar8 0x0108
+xtensa xtreg ar9 0x0109
+xtensa xtreg ar10 0x010a
+xtensa xtreg ar11 0x010b
+xtensa xtreg ar12 0x010c
+xtensa xtreg ar13 0x010d
+xtensa xtreg ar14 0x010e
+xtensa xtreg ar15 0x010f
+xtensa xtreg ar16 0x0110
+xtensa xtreg ar17 0x0111
+xtensa xtreg ar18 0x0112
+xtensa xtreg ar19 0x0113
+xtensa xtreg ar20 0x0114
+xtensa xtreg ar21 0x0115
+xtensa xtreg ar22 0x0116
+xtensa xtreg ar23 0x0117
+xtensa xtreg ar24 0x0118
+xtensa xtreg ar25 0x0119
+xtensa xtreg ar26 0x011a
+xtensa xtreg ar27 0x011b
+xtensa xtreg ar28 0x011c
+xtensa xtreg ar29 0x011d
+xtensa xtreg ar30 0x011e
+xtensa xtreg ar31 0x011f
+xtensa xtreg lbeg 0x0200
+xtensa xtreg lend 0x0201
+xtensa xtreg lcount 0x0202
+xtensa xtreg sar 0x0203
+xtensa xtreg windowbase 0x0248
+xtensa xtreg windowstart 0x0249
+xtensa xtreg configid0 0x02b0
+xtensa xtreg configid1 0x02d0
+xtensa xtreg ps 0x02e6
+xtensa xtreg expstate 0x03e6
+xtensa xtreg mmid 0x0259
+xtensa xtreg ibreakenable 0x0260
+xtensa xtreg ddr 0x0268
+xtensa xtreg ibreaka0 0x0280
+xtensa xtreg ibreaka1 0x0281
+xtensa xtreg dbreaka0 0x0290
+xtensa xtreg dbreaka1 0x0291
+xtensa xtreg dbreakc0 0x02a0
+xtensa xtreg dbreakc1 0x02a1
+xtensa xtreg epc1 0x02b1
+xtensa xtreg epc2 0x02b2
+xtensa xtreg epc3 0x02b3
+xtensa xtreg depc 0x02c0
+xtensa xtreg eps2 0x02c2
+xtensa xtreg eps3 0x02c3
+xtensa xtreg excsave1 0x02d1
+xtensa xtreg excsave2 0x02d2
+xtensa xtreg excsave3 0x02d3
+xtensa xtreg interrupt 0x02e2
+xtensa xtreg intset 0x02e2
+xtensa xtreg intclear 0x02e3
+xtensa xtreg intenable 0x02e4
+xtensa xtreg exccause 0x02e8
+xtensa xtreg debugcause 0x02e9
+xtensa xtreg ccount 0x02ea
+xtensa xtreg icount 0x02ec
+xtensa xtreg icountlevel 0x02ed
+xtensa xtreg excvaddr 0x02ee
+xtensa xtreg ccompare0 0x02f0
+xtensa xtreg ccompare1 0x02f1
+xtensa xtreg pwrctl 0x200f
+xtensa xtreg pwrstat 0x2010
+xtensa xtreg eristat 0x2011
+xtensa xtreg cs_itctrl 0x2012
+xtensa xtreg cs_claimset 0x2013
+xtensa xtreg cs_claimclr 0x2014
+xtensa xtreg cs_lockaccess 0x2015
+xtensa xtreg cs_lockstatus 0x2016
+xtensa xtreg cs_authstatus 0x2017
+xtensa xtreg fault_info 0x2026
+xtensa xtreg trax_id 0x2027
+xtensa xtreg trax_control 0x2028
+xtensa xtreg trax_status 0x2029
+xtensa xtreg trax_data 0x202a
+xtensa xtreg trax_address 0x202b
+xtensa xtreg trax_pctrigger 0x202c
+xtensa xtreg trax_pcmatch 0x202d
+xtensa xtreg trax_delay 0x202e
+xtensa xtreg trax_memstart 0x202f
+xtensa xtreg trax_memend 0x2030
+xtensa xtreg pmg 0x203e
+xtensa xtreg pmpc 0x203f
+xtensa xtreg pm0 0x2040
+xtensa xtreg pm1 0x2041
+xtensa xtreg pmctrl0 0x2042
+xtensa xtreg pmctrl1 0x2043
+xtensa xtreg pmstat0 0x2044
+xtensa xtreg pmstat1 0x2045
+xtensa xtreg ocdid 0x2046
+xtensa xtreg ocd_dcrclr 0x2047
+xtensa xtreg ocd_dcrset 0x2048
+xtensa xtreg ocd_dsr 0x2049
+xtensa xtreg psintlevel 0x2003
+xtensa xtreg psum 0x2004
+xtensa xtreg pswoe 0x2005
+xtensa xtreg psexcm 0x2006
+xtensa xtreg pscallinc 0x2007
+xtensa xtreg psowb 0x2008
--
