[PATCH]: 01bdfd7a8f FICR read with consideration of endian

[gerrit]

This is an automated email from Gerrit.

"こたまご (chibiegg) <chibi...@chibiegg.net>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7742

-- gerrit

commit 01bdfd7a8fec987377b16aff6a3f68f3d4b2691a
Author: chibiegg <chibi...@chibiegg.net>
Date:   Sat Jun 17 03:24:29 2023 +0900

    FICR read with consideration of endian
    
    Change-Id: I47e734d702e02270e884009d15f8f7ab1f998cab
    Signed-off-by: chibiegg <chibi...@chibiegg.net>

diff --git a/src/flash/nor/nrf91.c b/src/flash/nor/nrf91.c
index 099e5709a6..704c0f2aa5 100644
--- a/src/flash/nor/nrf91.c
+++ b/src/flash/nor/nrf91.c
@@ -228,18 +228,39 @@ static int nrf91_protect(struct flash_bank *bank, int 
set, unsigned int first, u
        return ERROR_OK;
 }
 
+static void read_ficr_from_buffer(struct target *target, uint8_t *buf, 
nrf_ficr_info_t *ficr)
+{
+       ficr->id = target_buffer_get_u64(target, buf);
+       buf += 8;
+       ficr->part = target_buffer_get_u32(target, buf);
+       buf += 4;
+       ficr->variant = target_buffer_get_u32(target, buf);
+       buf += 4;
+       ficr->package = target_buffer_get_u32(target, buf);
+       buf += 4;
+       ficr->ram = target_buffer_get_u32(target, buf);
+       buf += 4;
+       ficr->flash = target_buffer_get_u32(target, buf);
+       buf += 4;
+       ficr->code_page_size = target_buffer_get_u32(target, buf);
+       buf += 4;
+       ficr->code_size = target_buffer_get_u32(target, buf);
+}
+
 static int nrf91_read_ficr_info(nrf91_chip_t *chip)
 {
        int res;
        nrf_ficr_info_t ficr;
+       uint8_t ficr_buf[sizeof(nrf_ficr_info_t)];
 
        chip->ficr_info_valid = false;
 
-       res = target_read_buffer(chip->target, NRF91_FICR_DEVICEID0, 
sizeof(nrf_ficr_info_t), (uint8_t *)&ficr);
+       res = target_read_buffer(chip->target, NRF91_FICR_DEVICEID0, 
sizeof(nrf_ficr_info_t), ficr_buf);
        if (res != ERROR_OK) {
                LOG_INFO("Couldn't read FICR INFO registers");
                return res;
        }
+       read_ficr_from_buffer(chip->target, ficr_buf, &ficr);
 
        if (ficr.part != 0x9160 && ficr.part != 0x9120) {
                LOG_INFO("Wrong device %X", ficr.part);

--