This is an automated email from Gerrit.
"Steve Sims <ste...@broycecontrol.com>" just uploaded a new patch set to
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/7792
-- gerrit
commit fcbb7557f1e235d118cda2117ee3d705abc57017
Author: Steve Sims <ste...@broycecontrol.com>
Date: Thu Jul 13 16:27:52 2023 +0100
Patch set 3 review comments rectified
Change-Id: Ic2b1f032cac7d5163f2c6db4c68b859f2d99a85f
Signed-off-by: Steve Sims <ste...@broycecontrol.com>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 12a8ca56df..0036d80a81 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -6664,6 +6664,15 @@ flash bank $@{_FLASHNAME@}1 fm4 0x00100000 0 0 0 \
nor is Chip Erase (only Sector Erase is implemented).}
@end deffn
+@deffn {Flash Driver} {ht32f}
+Holtek HT32F internal flash based arm Cortex M0+/M3 devices all have the same
+flash memory controller configuration and therefore should work with this
driver.
+
+@example
+flash bank $_FLASHNAME ht32f 0 0 0 0 $_TARGETNAME
+@end example
+@end deffn
+
@deffn {Flash Driver} {kinetis}
@cindex kinetis
Kx, KLx, KVx and KE1x members of the Kinetis microcontroller family
diff --git a/src/flash/nor/ht32f.c b/src/flash/nor/ht32f.c
index a58d5d10f7..2ff46d7b46 100644
--- a/src/flash/nor/ht32f.c
+++ b/src/flash/nor/ht32f.c
@@ -4,13 +4,9 @@
#include "config.h"
#endif
-#include "../common.h"
-#include "../../target/target.h"
-#include "../../helper/command.h"
-#include "../../helper/log.h"
-
#include "imp.h"
#include <target/armv7m.h>
+#include <math.h>
#define FMC_REG_BASE 0x40080000
#define FMC_REG_TADR 0x00
@@ -40,7 +36,10 @@
#define FMC_COMMIT (0xA << 1)
#define FMC_FINISHED (0xE << 1)
-#define FLASH_ERASE_TIMEOUT 1000
+// TIMEOUTs below in counts of 10mS
+#define FLASH_ERASE_TIMEOUT 2
+#define FLASH_MASS_ERASE_TIMEOUT 10
+#define FLASH_WRITE_TIMEOUT 1
#define OPT_BYTE 0x1FF00000
@@ -114,17 +113,11 @@ static int ht32f_erase(struct flash_bank *bank, unsigned
int first, unsigned int
return retval;
LOG_DEBUG("ht32f erased page %d", i);
- bank->sectors[i].is_erased = 1;
}
return ERROR_OK;
}
-static int ht32f_protect(struct flash_bank *bank, int set, unsigned int first,
unsigned int last)
-{
- return ERROR_FLASH_OPER_UNSUPPORTED;
-}
-
static int ht32f_write(struct flash_bank *bank, const uint8_t *buffer,
uint32_t offset, uint32_t
count)
{
@@ -137,28 +130,29 @@ static int ht32f_write(struct flash_bank *bank, const
uint8_t *buffer,
return ERROR_TARGET_NOT_HALTED;
}
- if (offset & 0x3) {
- LOG_ERROR("offset 0x%" PRIx32 " breaks required 4-byte
alignment", offset);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
+ if (bank->write_start_alignment > 1 && bank->write_start_alignment !=
FLASH_WRITE_ALIGN_SECTOR) {
+ int start_alignment = pow(2, bank->write_start_alignment);
+ if (offset % start_alignment) {
+ LOG_ERROR("offset 0x%" PRIx32 " breaks required %d-byte
alignment", offset, start_alignment);
+ return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
+ }
}
-
- if (count & 0x3) {
- LOG_ERROR("size 0x%" PRIx32 " breaks required 4-byte
alignment", count);
- return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
+ if (bank->write_end_alignment > 1 && bank->write_end_alignment !=
FLASH_WRITE_ALIGN_SECTOR) {
+ int end_alignment = pow(2, bank->write_end_alignment);
+ if (count % end_alignment) {
+ LOG_ERROR("size 0x%" PRIx32 " breaks required %d-byte
alignment", count, end_alignment);
+ return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
+ }
}
uint32_t addr = offset;
for (uint32_t i = 0; i < count; i += 4) {
- uint32_t word = (buffer[i] << 0) | (buffer[i + 1] << 8) |
(buffer[i + 2] << 16) | (buffer[i + 3] << 24);
-
- LOG_DEBUG("ht32f flash write word 0x%x 0x%x 0x%08x", i, addr,
word);
-
// flash memory word program
int retval;
retval = target_write_u32(target, FMC_REG_BASE + FMC_REG_TADR,
addr);
if (retval != ERROR_OK)
return retval;
- retval = target_write_u32(target, FMC_REG_BASE + FMC_REG_WRDR,
word);
+ retval = target_write_memory(target, FMC_REG_BASE +
FMC_REG_WRDR, 4, 1, buffer + i);
if (retval != ERROR_OK)
return retval;
retval = target_write_u32(target, FMC_REG_BASE + FMC_REG_OCMR,
FMC_CMD_WORD_PROG);
@@ -169,7 +163,7 @@ static int ht32f_write(struct flash_bank *bank, const
uint8_t *buffer,
return retval;
// wait
- retval = ht32f_wait_status_busy(bank, FLASH_ERASE_TIMEOUT);
+ retval = ht32f_wait_status_busy(bank, FLASH_WRITE_TIMEOUT);
if (retval != ERROR_OK)
return retval;
addr += 4;
@@ -191,13 +185,10 @@ static int ht32f_probe(struct flash_bank *bank)
bank->base = 0x0;
bank->num_sectors = num_pages;
- bank->sectors = malloc(sizeof(struct flash_sector) * num_pages);
-
- for (int i = 0; i < num_pages; ++i) {
- bank->sectors[i].offset = i * page_size;
- bank->sectors[i].size = page_size;
- bank->sectors[i].is_erased = -1;
- bank->sectors[i].is_protected = 1;
+ bank->sectors = alloc_block_array(0, page_size, num_pages);
+ if (!bank->sectors) {
+ LOG_ERROR("ht32f probe: failed to allocate bank sectors");
+ return ERROR_FAIL;
}
return ERROR_OK;
@@ -278,43 +269,10 @@ COMMAND_HANDLER(ht32f_handle_mass_erase_command)
return retval;
retval = ht32f_mass_erase(bank);
- if (retval == ERROR_OK) {
- // set all sectors as erased
- unsigned int i;
- for (i = 0; i < bank->num_sectors; i++)
- bank->sectors[i].is_erased = 1;
-
- command_print(cmd, "ht32f mass erase complete");
- } else {
- command_print(cmd, "ht32f mass erase failed");
- }
-
- return retval;
-}
-
-COMMAND_HANDLER(ht32f_handle_test_write)
-{
- if (CMD_ARGC < 1)
- return ERROR_COMMAND_SYNTAX_ERROR;
-
- struct flash_bank *bank;
- int retval = CALL_COMMAND_HANDLER(flash_command_get_bank, 0, &bank);
- if (retval != ERROR_OK)
- return retval;
-
- uint8_t buffer[32];
- for (int i = 0; i < 32; ++i)
- buffer[i] = i;
-
- retval = ht32f_erase(bank, 0, 0);
- if (retval != ERROR_OK)
- return retval;
-
- retval = ht32f_write(bank, buffer, 0, 32);
if (retval == ERROR_OK)
- command_print(cmd, "ht32f test write complete");
+ command_print(cmd, "ht32f mass erase complete");
else
- command_print(cmd, "ht32f test write failed");
+ command_print(cmd, "ht32f mass erase failed with error %d",
retval);
return retval;
}
@@ -333,13 +291,6 @@ static const struct command_registration
ht32f_exec_command_handlers[] = {
.usage = "bank_id",
.help = "erase entire flash device",
},
- {
- .name = "test_write",
- .handler = ht32f_handle_test_write,
- .mode = COMMAND_EXEC,
- .usage = "bank_id",
- .help = " test flash write",
- },
COMMAND_REGISTRATION_DONE
};
@@ -359,7 +310,6 @@ const struct flash_driver ht32f_flash = {
.commands = ht32f_command_handlers,
.flash_bank_command = ht32f_flash_bank_command,
.erase = ht32f_erase,
- .protect = ht32f_protect,
.write = ht32f_write,
.read = default_flash_read,
.probe = ht32f_probe,
diff --git a/tcl/target/ht32f.cfg b/tcl/target/ht32f.cfg
index cb63790cab..5483cd7ef0 100644
--- a/tcl/target/ht32f.cfg
+++ b/tcl/target/ht32f.cfg
@@ -45,7 +45,7 @@ target create $_TARGETNAME cortex_m -endian $_ENDIAN -dap
$_CHIPNAME.dap
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
set _FLASHNAME $_CHIPNAME.flash
-flash bank $_FLASHNAME ht32f 0 0x00010000 0 0 $_TARGETNAME
+flash bank $_FLASHNAME ht32f 0 0 0 0 $_TARGETNAME
reset_config srst_nogate
--
