This is an automated email from Gerrit.

"Paul Fertser <fercer...@gmail.com>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/7856

-- gerrit

commit 916be61079314da5e5f96a015ecedf24c49327c1
Author: Artur Rojek <cont...@artur-rojek.eu>
Date:   Sat Aug 12 18:21:57 2023 +0200

    mips32: pad DRET with NOPs on exit from debug
    
    Make sure extra NOPs are placed after the DRET instruction. This fixes
    resume behavior on Ingenic JZ4780 SoC.
    
    Signed-off-by: Artur Rojek <cont...@artur-rojek.eu>
    Signed-off-by: Paul Fertser <fercer...@gmail.com>
    Change-Id: I77ba272d47a6827d6376929e78bfd6f566afb9ca

diff --git a/src/target/mips_ejtag.c b/src/target/mips_ejtag.c
index a1a179216d..22e9e3a7e8 100644
--- a/src/target/mips_ejtag.c
+++ b/src/target/mips_ejtag.c
@@ -261,7 +261,7 @@ int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
        struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = 
&pracc_list, .code_count = 1, .store_count = 0};
 
        /* execute our dret instruction */
-       ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 0); /* 
shift out instr, omit last check */
+       ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL, 1);
 
        /* pic32mx workaround, false pending at low core clock */
        jtag_add_sleep(1000);

-- 

Reply via email to