This is an automated email from Gerrit.
"Nishanth Menon <n...@ti.com>" just uploaded a new patch set to Gerrit, which
you can find at https://review.openocd.org/c/openocd/+/7897
-- gerrit
commit 51d0dbe794fe38447216a95bcbdb5e8158f6669e
Author: Dubravko Srsan <dubravko.sr...@dolotron.com>
Date: Wed Sep 13 16:23:03 2023 -0500
tcl/target/ti_k3: Add coreid identification to SMP processors
Describe the SMP Armv8 cores in SMP configuration with coreid
explicitly called out. This allows for gdb session to call the smp
behavior clearly.
Change-Id: Ie43be22db64737bbb66181f09d3c83567044f3ac
Signed-off-by: Dubravko Srsan <dubravko.sr...@dolotron.com>
Signed-off-by: Nishanth Menon <n...@ti.com>
diff --git a/tcl/target/ti_k3.cfg b/tcl/target/ti_k3.cfg
index d725f77658..5bcfcc6b73 100644
--- a/tcl/target/ti_k3.cfg
+++ b/tcl/target/ti_k3.cfg
@@ -266,7 +266,7 @@ for { set _core 0 } { $_core < $_armv8_cores } { incr _core
} {
cti create $_CTINAME.$_armv8_cpu_name.$_core -dap $_CHIPNAME.dap
-ap-num 1 \
-baseaddr [lindex $ARMV8_CTIBASE $_core]
- target create $_TARGETNAME.$_armv8_cpu_name.$_core aarch64 -dap
$_CHIPNAME.dap \
+ target create $_TARGETNAME.$_armv8_cpu_name.$_core aarch64 -dap
$_CHIPNAME.dap -coreid $_core \
-dbgbase [lindex $ARMV8_DBGBASE $_core] -cti
$_CTINAME.$_armv8_cpu_name.$_core -defer-examine
set _v8_smp_targets "$_v8_smp_targets
$_TARGETNAME.$_armv8_cpu_name.$_core"
--
