[PATCH]: 10dbfe0cac flash/nor/kinetis: create separate cache type for S32K

[gerrit]

This is an automated email from Gerrit.

"Carlos Sanchez <carlossanc...@geotab.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8012

-- gerrit

commit 10dbfe0cac7f52ce40997a02c6791520274b08f0
Author: Sven van Ashbrook <svenvanasbro...@geotab.com>
Date:   Tue May 10 14:53:58 2022 -0400

    flash/nor/kinetis: create separate cache type for S32K
    
    S32K cache registers are slightly different from Kinetis: there are
    two separate registers, one for program flash, one for data flash.
    
    Change-Id: I4143258535437c18b81802436267bfd561de9d31
    Signed-off-by: Sven van Ashbrook <svenvanasbro...@geotab.com>

diff --git a/src/flash/nor/kinetis.c b/src/flash/nor/kinetis.c
index e33570b69f..5674c391bb 100644
--- a/src/flash/nor/kinetis.c
+++ b/src/flash/nor/kinetis.c
@@ -80,6 +80,7 @@
 #define FLEXRAM                0x14000000
 
 #define MSCM_OCMDR0    0x40001400
+#define MSCM_OCMDR1    0x40001404
 #define FMC_PFB01CR    0x4001f004
 #define FTFX_FSTAT     0x40020000
 #define FTFX_FCNFG     0x40020001
@@ -301,9 +302,10 @@ struct kinetis_chip {
 
        enum {
                KINETIS_CACHE_NONE,
-               KINETIS_CACHE_K,        /* invalidate using FMC->PFB0CR/PFB01CR 
*/
-               KINETIS_CACHE_L,        /* invalidate using MCM->PLACR */
-               KINETIS_CACHE_MSCM,     /* devices like KE1xF, invalidate 
MSCM->OCMDR0 */
+               KINETIS_CACHE_K,                /* invalidate using 
FMC->PFB0CR/PFB01CR */
+               KINETIS_CACHE_L,                /* invalidate using MCM->PLACR 
*/
+               KINETIS_CACHE_MSCM,             /* devices like KE1xF, 
invalidate MSCM->OCMDR0 */
+               KINETIS_CACHE_MSCM2,    /* devices like S32K, invalidate 
MSCM->OCMDR0 and MSCM->OCMDR1 */
        } cache_type;
 
        enum {
@@ -1670,6 +1672,12 @@ static void kinetis_invalidate_flash_cache(struct 
kinetis_chip *k_chip)
                /* disable data prefetch and flash speculate */
                break;
 
+       case KINETIS_CACHE_MSCM2:
+               target_write_u32(target, MSCM_OCMDR0, 0x30);
+               target_write_u32(target, MSCM_OCMDR1, 0x30);
+               /* disable data prefetch and flash speculate */
+               break;
+
        default:
                break;
        }
@@ -2104,7 +2112,7 @@ static int s32k_probe_chip(struct kinetis_chip *k_chip)
        case S32K_SDID_SERIES_K14X:
                k_chip->flash_support = FS_PROGRAM_PHRASE | FS_PROGRAM_SECTOR;
                k_chip->watchdog_type = KINETIS_WDOG32_KE1X;
-               k_chip->cache_type = KINETIS_CACHE_MSCM;
+               k_chip->cache_type = KINETIS_CACHE_MSCM2;
                k_chip->progr_accel_ram = FLEXRAM;
 
                switch (sim_sdid & S32K_SDID_DERIVATE_MASK) {

--