This is an automated email from Gerrit.
"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which
you can find at https://review.openocd.org/c/openocd/+/8098
-- gerrit
commit c0cb3d306a896ec8363194839935398ce6ba40dc
Author: Tomas Vanek <van...@fbl.cz>
Date: Sun Jan 21 12:05:35 2024 +0100
target/cortex_m: drop useless target_halt() call
In 2008 the commit 182936125371 ("define resetting
the target into the halted or running state as an atomic operation.")
introduced the target_halt() call to the end of cortex_m3_assert_reset(),
Checkpatch-ignore: GIT_COMMIT_ID
A year later the commit ed36a8d15dfd
("... Updated halt handling for cortex_m3")
prevented cortex_m3_halt() take any action in case of TARGET_RESET state.
This narrowed the target_halt() called from cortex_m3_assert_reset()
to setting target->halt_issued and storing a time stamp.
Introducing ocd_process_reset(_inner) made the setting of halt_issued
and halt_issued_time useless. The Tcl function waits for halt
of all targets if applicable.
cortex_m_halt() and also target_halt() does not work as expected
if the cached target state is TARGET_RESET (although the core could
be out of reset and ready to be halted, just have not been polled).
Explicit Tcl arp_poll must be issued in many scenarios.
Remove the useless hack.
Also remove the explicit error return from cortex_m_halt_one()
in case of RESET_SRST_PULLS_TRST and asserted srst. If the communication
with the target is gated by any reset, cortex_m_write_debug_halt_mask()
fails. Propagate the error return of this call instead.
Change-Id: I0da05b87f43c3d0facb78e54d8f00c1728fe7c46
Signed-off-by: Tomas Vanek <van...@fbl.cz>
diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 8bb852f4f8..fb1794af22 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -1106,6 +1106,7 @@ static int cortex_m_poll(struct target *target)
static int cortex_m_halt_one(struct target *target)
{
+ int retval;
LOG_TARGET_DEBUG(target, "target->state: %s",
target_state_name(target));
if (target->state == TARGET_HALTED) {
@@ -1116,22 +1117,8 @@ static int cortex_m_halt_one(struct target *target)
if (target->state == TARGET_UNKNOWN)
LOG_TARGET_WARNING(target, "target was in unknown state when
halt was requested");
- if (target->state == TARGET_RESET) {
- if ((jtag_get_reset_config() & RESET_SRST_PULLS_TRST) &&
jtag_get_srst()) {
- LOG_TARGET_ERROR(target, "can't request a halt while in
reset if nSRST pulls nTRST");
- return ERROR_TARGET_FAILURE;
- } else {
- /* we came here in a reset_halt or reset_init sequence
- * debug entry was already prepared in
cortex_m3_assert_reset()
- */
- target->debug_reason = DBG_REASON_DBGRQ;
-
- return ERROR_OK;
- }
- }
-
/* Write to Debug Halting Control and Status Register */
- cortex_m_write_debug_halt_mask(target, C_HALT, 0);
+ retval = cortex_m_write_debug_halt_mask(target, C_HALT, 0);
/* Do this really early to minimize the window where the MASKINTS
erratum
* can pile up pending interrupts. */
@@ -1139,7 +1126,7 @@ static int cortex_m_halt_one(struct target *target)
target->debug_reason = DBG_REASON_DBGRQ;
- return ERROR_OK;
+ return retval;
}
static int cortex_m_halt(struct target *target)
@@ -1755,17 +1742,7 @@ static int cortex_m_assert_reset(struct target *target)
register_cache_invalidate(cortex_m->armv7m.arm.core_cache);
- /* now return stored error code if any */
- if (retval != ERROR_OK)
- return retval;
-
- if (target->reset_halt && target_was_examined(target)) {
- retval = target_halt(target);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return ERROR_OK;
+ return retval;
}
static int cortex_m_deassert_reset(struct target *target)
--
