[PATCH]: 8782530f30 flash/nor/nrf5: show proper SoC type on newer nRF91 devices

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/8114

-- gerrit

commit 8782530f3062e996964b30abbcc38296b58a13cb
Author: Tomas Vanek <van...@fbl.cz>
Date:   Mon Jan 22 18:17:48 2024 +0100

    flash/nor/nrf5: show proper SoC type on newer nRF91 devices
    
    Since nRF9160 Product Specification v2.1 the new UICR SIPINFO
    fields should be preferred over UICR INFO.
    Tested on nRF9161.
    
    Signed-off-by: Tomas Vanek <van...@fbl.cz>
    Change-Id: Ib8005b3b6292aa20fa83c1dcebd2de27df58b661

diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c
index 4d02947462..db4c4b8552 100644
--- a/src/flash/nor/nrf5.c
+++ b/src/flash/nor/nrf5.c
@@ -11,6 +11,8 @@
 #include "config.h"
 #endif
 
+#include <byteswap.h>
+
 #include "imp.h"
 #include <helper/binarybuffer.h>
 #include <target/algorithm.h>
@@ -285,6 +287,22 @@ static const struct nrf5_ficr_map nrf53_91_ficr_offsets = {
        .info_flash = 0x21c,
 };
 
+/* Since nRF9160 Product Specification v2.1 there is
+ * a new UICR field SIPINFO, which should be preferred.
+ * The original INFO fields describe just a part of the chip
+ * (PARTNO=9120 at nRF9161)
+ */
+static const struct nrf5_ficr_map nrf91new_ficr_offsets = {
+       .codepagesize = 0x220,
+       .codesize = 0x224,
+       .configid = 0x200,
+       .info_part = 0x140,             /* SIPINFO.PARTNO */
+       .info_variant = 0x148,  /* SIPINFO.VARIANT */
+       .info_package = 0x214,
+       .info_ram = 0x218,
+       .info_flash = 0x21c,
+};
+
 enum {
        NRF53APP_91_FICR_BASE = 0x00FF0000,
        NRF53APP_91_UICR_BASE = 0x00FF8000,
@@ -646,7 +664,11 @@ static int nrf5_get_chip_type_str(const struct nrf5_info 
*chip, char *buf, unsig
                                chip->spec->part, chip->spec->variant, 
chip->spec->build_code);
        } else if (chip->ficr_info_valid) {
                char variant[5];
-               nrf5_info_variant_to_str(chip->ficr_info.variant, variant);
+               uint32_t swap_variant = chip->ficr_info.variant;
+               if (chip->features & NRF5_FEATURE_SERIES_91)
+                       swap_variant = bswap_32(swap_variant);
+
+               nrf5_info_variant_to_str(swap_variant, variant);
                if (chip->features & (NRF5_FEATURE_SERIES_53 | 
NRF5_FEATURE_SERIES_91)) {
                        res = snprintf(buf, buf_size, "nRF%" PRIx32 "-%s",
                                        chip->ficr_info.part, variant);
@@ -825,6 +847,16 @@ static int nrf5_probe(struct flash_bank *bank)
        switch (bank->base) {
        case NRF5_FLASH_BASE:
        case NRF53APP_91_UICR_BASE:
+               res = nrf5_read_ficr_info_part(chip, &nrf53app_91_map, 
&nrf91new_ficr_offsets);
+               if (res == ERROR_OK) {
+                       res = nrf53_91_partno_check(chip);
+                       if (res == ERROR_OK) {
+                               chip->map = &nrf53app_91_map;
+                               chip->ficr_offsets = &nrf91new_ficr_offsets;
+                               break;
+                       }
+               }
+
                res = nrf5_read_ficr_info_part(chip, &nrf53app_91_map, 
&nrf53_91_ficr_offsets);
                if (res != ERROR_OK)
                        break;

--