This is an automated email from Gerrit.
"Daniel Golle <dan...@makrotopia.org>" just uploaded a new patch set to Gerrit,
which you can find at https://review.openocd.org/c/openocd/+/8148
-- gerrit
commit 5ff05134cefe216786cfcdf9884c9cf6d8cce96b
Author: Weijie Gao <weijie....@mediatek.com>
Date: Tue Feb 2 10:51:25 2021 +0800
armv8: do not read ESR_EL3 in AArch32 state
Currently reading ESR_EL3 in AArch32 state is not supported, and an error
will br returned directly by armv8_read_reg32(). This error will cause
the armv8_dpm_read_current_registers() to fail immediately.
Everytime a core is halted in AArch32 state, openocd will behave
abnormally with error "Failed to read ESR_EL3 register". For example the
current core state, mode, PC, CPSR, cache and MMU state will not be shown.
By just skipping reading ESR_EL3 in AArch32 state, this issue can be
easily fixed with no side effect.
Change-Id: I16dd914ca1373e6914fb8bf7137b316575c4317c
Signed-off-by: Weijie Gao <weijie....@mediatek.com>
diff --git a/jimtcl b/jimtcl
index 1933e5457b..a77ef1a621 160000
--- a/jimtcl
+++ b/jimtcl
@@ -1 +1 @@
-Subproject commit 1933e5457b9512d39ebbe11ed32578aada149f49
+Subproject commit a77ef1a6218fad4c928ddbdc03c1aedc41007e70
diff --git a/src/target/armv8_dpm.c b/src/target/armv8_dpm.c
index 8bb24f225b..578888b1ac 100644
--- a/src/target/armv8_dpm.c
+++ b/src/target/armv8_dpm.c
@@ -803,6 +803,10 @@ int armv8_dpm_read_current_registers(struct arm_dpm *dpm)
if (r->number == ARMV8_SPSR_EL1 && arm->core_mode ==
ARM_MODE_SYS)
continue;
+ /* Skip reading ESR_EL3 in AArch32 state */
+ if (r->number == ARMV8_ESR_EL3 && arm->core_state !=
ARM_STATE_AARCH64)
+ continue;
+
retval = dpmv8_read_reg(dpm, r, i);
if (retval != ERROR_OK)
goto fail;
--
