This is an automated email from Gerrit. "Erhan Kurubas <erhan.kuru...@espressif.com>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8162
-- gerrit commit c25bbdf8953b18434f629a47e25740f75bde48df Author: Erhan Kurubas <erhan.kuru...@espressif.com> Date: Sat Feb 24 20:29:41 2024 +0100 target/esp_xtensa_smp: don't use coreid as an SMP index For the sake of https://review.openocd.org/c/openocd/+/7957 Instead of "coreid", 'target smp' command call order used as an index Signed-off-by: Erhan Kurubas <erhan.kuru...@espressif.com> Change-Id: Iab86b81868d37c0bf8663707ee11367c41f6b96d diff --git a/src/target/espressif/esp_xtensa_smp.c b/src/target/espressif/esp_xtensa_smp.c index f883b1ce76..c49146d787 100644 --- a/src/target/espressif/esp_xtensa_smp.c +++ b/src/target/espressif/esp_xtensa_smp.c @@ -94,8 +94,11 @@ int esp_xtensa_smp_soft_reset_halt(struct target *target) LOG_TARGET_DEBUG(target, "begin"); /* in SMP mode we need to ensure that at first we reset SOC on PRO-CPU and then call xtensa_assert_reset() for all cores */ - if (target->smp && target->coreid != 0) - return ERROR_OK; + if (target->smp) { + head = list_first_entry(target->smp_targets, struct target_list, lh); + if (head->target != target) + return ERROR_OK; + } /* Reset the SoC first */ if (esp_xtensa_smp->chip_ops->reset) { res = esp_xtensa_smp->chip_ops->reset(target); --