This is an automated email from Gerrit.
"Reto Schneider <c...@reto-schneider.ch>" just uploaded a new patch set to
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8212
-- gerrit
commit 5c21849760100be8489c8570527896b5f2313d03
Author: Reto Schneider <c...@reto-schneider.ch>
Date: Sat Apr 13 19:39:49 2024 +0200
target: sim3x: Add reset workaround
On SiM3U1xx, doing a chip reset also takes down the debug port. For this
reason, we disable the chip reset and instead only reset the Cortex-M
via the AIRCR SYSRESETREQ bit, as suggested in the chip's errata:
https://www.silabs.com/documents/public/errata/SiM3U1xx-SiM3C1xxErrata.pdf
Change-Id: Ifcb9940e7c75819c6e33804e554002df0f56e416
Signed-off-by: Reto Schneider <c...@reto-schneider.ch>
diff --git a/tcl/target/sim3x.cfg b/tcl/target/sim3x.cfg
index e6bea70e23..59520510cc 100644
--- a/tcl/target/sim3x.cfg
+++ b/tcl/target/sim3x.cfg
@@ -56,3 +56,9 @@ adapter srst delay 100
if {[using_jtag]} {
jtag_ntrst_delay 100
}
+
+# On SiM3U1xx, doing a chip reset also takes down the debug port. For this
+# reason, we disable the chip reset and instead only reset the Cortex-M via the
+# AIRCR SYSRESETREQ bit, as suggested in the chip's errata:
+# https://www.silabs.com/documents/public/errata/SiM3U1xx-SiM3C1xxErrata.pdf
+cortex_m reset_config sysresetreq
--
