[PATCH]: a43eac24bb target: cortex_a: fix regs invalidation when -defer-examine

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8215

-- gerrit

commit a43eac24bbf9d509ac09ca393d0e93ebb014872c
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date:   Sat Apr 13 18:54:12 2024 +0200

    target: cortex_a: fix regs invalidation when -defer-examine
    
    The code for cortex_a allocates the register cache during the very
    first examine of the target.
    To prevent a segmentation fault in assert_reset(), the call to
    register_cache_invalidate() is guarded by target_was_examined().
    
    But for targets with -defer-examine, the target is set as not
    examined in handle_target_reset() just before entering in
    assert_reset().
    
    This causes registers to not be invalidated while reset a target
    examined but with -defer-examine.
    
    Change the condition and invalidate the register cache if it has
    been already allocated.
    
    Change-Id: I81ae782ddce07431d5f2c1bea3e2f19dfcd6d1ce
    Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>

diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 7fa0c4e8b7..78fd4482c3 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -1932,7 +1932,7 @@ static int cortex_a_assert_reset(struct target *target)
        }
 
        /* registers are now invalid */
-       if (target_was_examined(target))
+       if (armv7a->arm.core_cache)
                register_cache_invalidate(armv7a->arm.core_cache);
 
        target->state = TARGET_RESET;

--