[PATCH]: 270c3f3bd0 target: aarch64: access reg SPSR_EL1 only in EL1, EL2 and EL3

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8276

-- gerrit

commit 270c3f3bd0ce1043f7eba3ed67b7a33163ef8a58
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date:   Tue May 14 14:40:07 2024 +0200

    target: aarch64: access reg SPSR_EL1 only in EL1, EL2 and EL3
    
    The register SPSR_EL1 is accessible and it's content is relevant
    only when the target is in EL1 or EL2 or EL3.
    Plus, the register is 64 bits wide.
    
    Without this patch, an error:
            Error: Opcode 0xd5384000, DSCR.ERR=1, DSCR.EL=1
    is triggered by GDB register window or through GDB command
            x/p $SPSR_EL1
    or through OpenOCD command
            reg SPSR_EL1
    
    Detect the EL and return error if the register cannot be accessed.
    Handle the register as 64 bits.
    
    Change-Id: Ia0f984d52920cc32b8ee31157d62c13dea616a3a
    Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>

diff --git a/src/target/armv8.c b/src/target/armv8.c
index 14b1726892..b54ef13d37 100644
--- a/src/target/armv8.c
+++ b/src/target/armv8.c
@@ -369,9 +369,13 @@ static int armv8_read_reg(struct armv8_common *armv8, int 
regnum, uint64_t *regv
                                ARMV8_MRS(SYSTEM_ESR_EL3, 0), &value_64);
                break;
        case ARMV8_SPSR_EL1:
-               retval = dpm->instr_read_data_r0(dpm,
-                               ARMV8_MRS(SYSTEM_SPSR_EL1, 0), &value);
-               value_64 = value;
+               if (curel < SYSTEM_CUREL_EL1) {
+                       LOG_DEBUG("SPSR_EL1 not accessible in EL%u", curel);
+                       retval = ERROR_FAIL;
+                       break;
+               }
+               retval = dpm->instr_read_data_r0_64(dpm,
+                               ARMV8_MRS(SYSTEM_SPSR_EL1, 0), &value_64);
                break;
        case ARMV8_SPSR_EL2:
                if (curel < SYSTEM_CUREL_EL2) {
@@ -526,9 +530,13 @@ static int armv8_write_reg(struct armv8_common *armv8, int 
regnum, uint64_t valu
                                ARMV8_MSR_GP(SYSTEM_ESR_EL3, 0), value_64);
                break;
        case ARMV8_SPSR_EL1:
-               value = value_64;
-               retval = dpm->instr_write_data_r0(dpm,
-                               ARMV8_MSR_GP(SYSTEM_SPSR_EL1, 0), value);
+               if (curel < SYSTEM_CUREL_EL1) {
+                       LOG_DEBUG("SPSR_EL1 not accessible in EL%u", curel);
+                       retval = ERROR_FAIL;
+                       break;
+               }
+               retval = dpm->instr_write_data_r0_64(dpm,
+                               ARMV8_MSR_GP(SYSTEM_SPSR_EL1, 0), value_64);
                break;
        case ARMV8_SPSR_EL2:
                if (curel < SYSTEM_CUREL_EL2) {
@@ -1582,7 +1590,7 @@ static const struct {
                                                                                
                                NULL},
        { ARMV8_ESR_EL1, "ESR_EL1", 64, ARMV8_64_EL1H, REG_TYPE_UINT64, 
"banked", "net.sourceforge.openocd.banked",
                                                                                
                                NULL},
-       { ARMV8_SPSR_EL1, "SPSR_EL1", 32, ARMV8_64_EL1H, REG_TYPE_UINT32, 
"banked", "net.sourceforge.openocd.banked",
+       { ARMV8_SPSR_EL1, "SPSR_EL1", 64, ARMV8_64_EL1H, REG_TYPE_UINT64, 
"banked", "net.sourceforge.openocd.banked",
                                                                                
                                NULL},
 
        { ARMV8_ELR_EL2, "ELR_EL2", 64, ARMV8_64_EL2H, REG_TYPE_CODE_PTR, 
"banked", "net.sourceforge.openocd.banked",

--