This is an automated email from Gerrit.
"zapb <d...@zapb.de>" just uploaded a new patch set to Gerrit, which you can
find at https://review.openocd.org/c/openocd/+/8372
-- gerrit
commit 6b73b7d8e72fa5578eb059d695f1530d60673cac
Author: Marc Schink <d...@zapb.de>
Date: Thu May 18 11:29:04 2023 +0200
tcl/target: Add GigaDevice GD32L233x config
Change-Id: I067b7e6e7e121fdca60d84f0bd411423187bd643
Signed-off-by: Marc Schink <d...@zapb.de>
diff --git a/tcl/target/gigadevice/gd32l233x.cfg
b/tcl/target/gigadevice/gd32l233x.cfg
new file mode 100644
index 0000000000..06bb7f53a3
--- /dev/null
+++ b/tcl/target/gigadevice/gd32l233x.cfg
@@ -0,0 +1,46 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+#
+# GigaDevice GD32L233x target
+#
+# https://www.gigadevice.com/product/mcu/arm-cortex-m23
+#
+
+# This microcontroller series supports only SWD transport.
+transport select swd
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME gd32l233x
+}
+
+# Work-area size in RAM used for flash operations (16 KiB).
+if { [info exists WORKAREASIZE] } {
+ set _WORKAREASIZE $WORKAREASIZE
+} else {
+ set _WORKAREASIZE 0x4000
+}
+
+if { [info exists CPUTAPID] } {
+ set _CPUTAPID $CPUTAPID
+} else {
+ set _CPUTAPID 0x0bf11477
+}
+
+swd newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
+dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
+
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -endian little -dap $_CHIPNAME.dap
+
+$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size
$_WORKAREASIZE -work-area-backup 0
+
+set _FLASHNAME $_CHIPNAME.flash
+flash bank $_FLASHNAME stm32f1x 0 0 0 0 $_TARGETNAME
+
+adapter speed 1000
+
+if {![using_hla]} {
+ cortex_m reset_config sysresetreq
+}
--
