[PATCH]: 8e18f0874c target: cortex_m: fix polling for target kept under reset

[gerrit]

This is an automated email from Gerrit.

"Antonio Borneo <borneo.anto...@gmail.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8399

-- gerrit

commit 8e18f0874c1fced5870114163d092f2f872a1be5
Author: Antonio Borneo <borneo.anto...@gmail.com>
Date:   Mon Jul 15 11:56:36 2024 +0200

    target: cortex_m: fix polling for target kept under reset
    
    In multi-target SoC not all the targets are running simultaneously
    and some target could be powered off or kept under reset.
    Commit 4892e32294c6 ("target/cortex_m: allow poll quickly get out
    of TARGET_RESET state") does not considers the case of a target
    that is kept in reset and expects the target to change state from
    TARGET_RESET immediately.
    This causes OpenOCD to log continuously:
            Info : [stm32mp15x.cm4] external reset detected
            Info : [stm32mp15x.cm4] external reset detected
            Info : [stm32mp15x.cm4] external reset detected
    
    Read again dhcsr to detect the 'stable' reset status and quit,
    waiting for next poll to re-check the target's status.
    
    Change-Id: Ic66029b988404a1599bb99bc66d4a8845b8b02c6
    Signed-off-by: Antonio Borneo <borneo.anto...@gmail.com>
    Fixes: 4892e32294c6 ("target/cortex_m: allow poll quickly get out of 
TARGET_RESET state")

diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
index 791a432427..a300992a41 100644
--- a/src/target/cortex_m.c
+++ b/src/target/cortex_m.c
@@ -988,6 +988,18 @@ static int cortex_m_poll_one(struct target *target)
                         * and keep it until the next poll to allow its 
detection */
                        return ERROR_OK;
                }
+
+               /* refresh status bits */
+               retval = cortex_m_read_dhcsr_atomic_sticky(target);
+               if (retval != ERROR_OK)
+                       return retval;
+
+               /* If still under reset, quit and re-check at next poll */
+               if (cortex_m->dcb_dhcsr_cumulated_sticky & S_RESET_ST) {
+                       cortex_m->dcb_dhcsr_cumulated_sticky &= ~S_RESET_ST;
+                       return ERROR_OK;
+               }
+
                /* S_RESET_ST was expected (in a reset command). Continue 
processing
                 * to quickly get out of TARGET_RESET state */
        }

--