This is an automated email from Gerrit.
"David Grayson <ela...@gmail.com>" just uploaded a new patch set to Gerrit,
which you can find at https://review.openocd.org/c/openocd/+/8525
-- gerrit
commit 8bee56cb55a7643ea0f37514ce32a0c5f9b81f22
Author: David (Pololu) <dev-da...@pololu.com>
Date: Tue Oct 8 12:14:14 2024 -0700
flash/stm32l4x: add STM32C071xx support
I successfully programmed a NUCLEO-C071RB with these changes.
Change-Id: Ib57a77fa18f8a0e8c882e2250d6111c588d76887
Signed-off-by: David (Pololu) <dev-da...@pololu.com>
diff --git a/doc/openocd.texi b/doc/openocd.texi
index 97396c7b70..b156ca4e29 100644
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -8007,7 +8007,7 @@ The @var{num} parameter is a value shown by
@command{flash banks}.
@end deffn
@deffn {Flash Driver} {stm32l4x}
-All members of the STM32 G0, G4, L4, L4+, L5, U5, WB and WL
+All members of the STM32 C0, G0, G4, L4, L4+, L5, U5, WB and WL
microcontroller families from STMicroelectronics include internal flash
and use ARM Cortex-M0+, M4 and M33 cores.
The driver automatically recognizes a number of these chips using
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index d66a83dd34..965e61c27a 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -297,6 +297,10 @@ static const struct stm32l4_rev stm32c03xx_revs[] = {
{ 0x1000, "A" }, { 0x1001, "Z" },
};
+static const struct stm32l4_rev stm32c071xx_revs[] = {
+ { 0x1001, "Z" },
+};
+
static const struct stm32l4_rev stm32g05_g06xx_revs[] = {
{ 0x1000, "A" },
};
@@ -432,6 +436,18 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
+ {
+ .id = DEVID_STM32C071XX,
+ .revs = stm32c071xx_revs,
+ .num_revs = ARRAY_SIZE(stm32c071xx_revs),
+ .device_str = "STM32C071xx",
+ .max_flash_size_kb = 128,
+ .flags = F_NONE,
+ .flash_regs_base = 0x40022000,
+ .fsize_addr = 0x1FFF75A0,
+ .otp_base = 0x1FFF7000,
+ .otp_size = 1024,
+ },
{
.id = DEVID_STM32U53_U54XX,
.revs = stm32u53_u54xx_revs,
@@ -1955,6 +1971,7 @@ static int stm32l4_probe(struct flash_bank *bank)
case DEVID_STM32L43_L44XX:
case DEVID_STM32C01XX:
case DEVID_STM32C03XX:
+ case DEVID_STM32C071XX:
case DEVID_STM32G05_G06XX:
case DEVID_STM32G07_G08XX:
case DEVID_STM32L45_L46XX:
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 5f3bc26576..730f152f32 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -106,6 +106,7 @@
#define DEVID_STM32U59_U5AXX 0x481
#define DEVID_STM32U57_U58XX 0x482
#define DEVID_STM32WBA5X 0x492
+#define DEVID_STM32C071XX 0x493
#define DEVID_STM32WB1XX 0x494
#define DEVID_STM32WB5XX 0x495
#define DEVID_STM32WB3XX 0x496
diff --git a/tcl/board/st_nucleo_c0.cfg b/tcl/board/st_nucleo_c0.cfg
new file mode 100644
index 0000000000..d95b374017
--- /dev/null
+++ b/tcl/board/st_nucleo_c0.cfg
@@ -0,0 +1,13 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+# This is for the NUCLEO-C071RB, and possibly other
+# Nucleo C0 boards in the future.
+# https://www.st.com/en/evaluation-tools/nucleo-c071rb.html
+
+source [find interface/stlink.cfg]
+
+transport select hla_swd
+
+source [find target/stm32c0x.cfg]
+
+reset_config srst_only
--
