[PATCH]: 1a4f26b488 target: riscv: resume all thread group members when run algorithm

[gerrit]

This is an automated email from Gerrit.

"Conor Paxton <conor.pax...@microchip.com>" just uploaded a new patch set to 
Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8559

-- gerrit

commit 1a4f26b4887ee9c3ba2278e88e40296e3a2e1637
Author: Conor Paxton <conor.pax...@microchip.com>
Date:   Tue Jun 18 22:09:12 2024 +0100

    target: riscv: resume all thread group members when run algorithm
    
    When there are multiple harts in the same thread group, all harts should
    be resumed, not just the hart that runs the algorithm code.
    
    This may be different for multi processor configurations.
    
    Change-Id: I46e85d58c2b04d8ea53d2e8f7e41fc03ab1f9815
    Signed-off-by: Tommy Murphy <tommy_mur...@hotmail.com>
    Signed-off-by: Anton Krug <anton.k...@gmail.com>
    Signed-off-by: Daire McNamara <daire.mcnam...@microchip.com>
    Signed-off-by: Matteo Bonicolini <matteo.bonicol...@microchip.com>
    Signed-off-by: Conor Paxton <conor.pax...@microchip.com>

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index e66e35b277..76afb26734 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -2163,7 +2163,7 @@ static int riscv_run_algorithm(struct target *target, int 
num_mem_params,
 
        /* Run algorithm */
        LOG_DEBUG("resume at 0x%" TARGET_PRIxADDR, entry_point);
-       if (riscv_resume(target, 0, entry_point, 0, 0, true) != ERROR_OK)
+       if (riscv_resume(target, 0, entry_point, 0, 0, false) != ERROR_OK)
                return ERROR_FAIL;
 
        int64_t start = timeval_ms();

--