This is an automated email from Gerrit. "Henrik Mau <henrik....@analog.com>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/8581
-- gerrit commit d153e808db8e74381cc1440848d84529075ab3cf Author: Henrik Mau <henrik....@analog.com> Date: Wed Nov 13 11:07:41 2024 +0000 target/xtensa: add comment on the ISR mask for Xtensa NX Add comment describing the difference between Xtensa LX and Xtensa NX when masking interrupts during single stepping. Change-Id: I2c9f9a621c5a0885e236ee7286e851b70c0a7102 Signed-off-by: Henrik Mau <henrik....@analog.com> diff --git a/src/target/xtensa/xtensa.c b/src/target/xtensa/xtensa.c index 84cf26cd77..209c16e5f4 100644 --- a/src/target/xtensa/xtensa.c +++ b/src/target/xtensa/xtensa.c @@ -1792,7 +1792,9 @@ int xtensa_do_step(struct target *target, int current, target_addr_t address, in /* Update ICOUNTLEVEL accordingly */ icountlvl = MIN((oldps & 0xF) + 1, xtensa->core_config->debug.irq_level); } else { - /* Disable interrupts while stepping */ + /* Xtensa NX does not have the ICOUNTLEVEL feature present in Xtensa LX + * and instead disable interrupts while stepping. This could change + * the timing of the system while under debug */ xtensa_reg_val_t newps = oldps | XT_PS_DI_MSK; xtensa_reg_set(target, XT_REG_IDX_PS, newps); icountlvl = xtensa->core_config->debug.irq_level; --