HI, Add some new findings： I guessed that the above phenomenon might have something to do with DAP's APB-AP, so I looked at the mem_ap_init function and added some tests.(Refer to the attached picture)
Then I found that all the APB-AP read values were 0, which was not normal. But when I use the xt-ocd tool, APB-AP is able to read the correct value. Like this: " 0: Powering up the DAP Successful. 0: dap600_sel: 0x0, dap_ap_sel: 0x0 0: AP_CSW (0x0) < ... 0: Old bank/sel: -1/-1. New bank/sel: 0/0 0: DP_SELECT (0x2) < 0x0 0: 0x000000004 > DPACC (A: 2, D:00000000, WR) 0: DPACC > 0x7f07e0000002 (D:fc000000, S:2 [OK_FAULT]) 0: 0x000000001 > APACC (A: 0, D:00000000, RD) 0: APACC > 0x7f0000000002 (D:00000000, S:2 [OK_FAULT]) 0: DPACC > 0x7f0400000212 (D:80000042, S:2 [OK_FAULT]) 0: AP_CSW > 0x80000042 0: APB-AP Enabled (AP_CSW:0x80000042) 0: AP_IDR (0xfc) < ... 0: Old bank/sel: 0/0. New bank/sel: 15/0 0: DP_SELECT (0x2) < 0xf0 0: 0x000000784 > DPACC (A: 2, D:000000f0, WR) 0: DPACC > 0x7f07e0000002 (D:fc000000, S:2 [OK_FAULT]) 0: 0x000000007 > APACC (A: 3, D:00000000, RD) 0: APACC > 0x7f0000000782 (D:000000f0, S:2 [OK_FAULT]) 0: DPACC > 0x7f02a3b80012 (D:54770002, S:2 [OK_FAULT]) 0: AP_IDR > 0x54770002 0: APB-AP IDCODE: 0x54770002 " AP_CSW=0x80000042 AP_ID=0x54770002 But when I use openocd, I can't read anything, so I suspect that later register exceptions such as DDR DSR have something to do with it. Is there any other configuration required for me to enable APB AP correctly? Attachments: - [1.png](https://sourceforge.net/p/openocd/tickets/_discuss/thread/ce8bb4132e/3970/attachment/1.png) (151.0 kB; image/png) - [2.png](https://sourceforge.net/p/openocd/tickets/_discuss/thread/ce8bb4132e/3970/attachment/2.png) (212.6 kB; image/png) - [3.png](https://sourceforge.net/p/openocd/tickets/_discuss/thread/ce8bb4132e/3970/attachment/3.png) (286.4 kB; image/png) --- **[tickets:#445] openocd with xtensa core problem(about debug data reg)** **Status:** new **Milestone:** 0.11.0 **Created:** Fri Dec 06, 2024 05:30 AM UTC by vitocichen **Last Updated:** Mon Dec 09, 2024 03:32 AM UTC **Owner:** nobody HI, I am debugging xtensa core using openocd tool. The connection relationship of my system is as follows: << jlink--->coresight dap--->APB_AP(ap_num=0)----->xtensa core0/1/2 >> The gdb tool I use is xt-gdb, but I find that the values of my pc registers, a0-a15,ar0-ar15, etc. are strange during reuse, their highest bit bit31 is always 1, bit30 is always 0, but this value is wrong. I finally found that openocd had a problem when reading and writing the DDR (debug data reg) register, in order to better explain the phenomenon. I've added a test function in openocd source, in the SRC/target/xtensa/xtensa. C I added a test function, the code is as follows: /************************************************************************************/ void ddr_test(struct target target) { struct xtensa xtensa = target_to_xtensa(target); uint8_t a3_buf[4]={0}; LOG_DEBUG("***ddr test******"); xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, 0x12345678); xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR,a3_buf); LOG_DEBUG("A3[0]=%X",a3_buf[0]); LOG_DEBUG("A3[1]=%X",a3_buf[1]); LOG_DEBUG("A3[2]=%X",a3_buf[2]); LOG_DEBUG("A3[3]=%X",a3_buf[3]); xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, 0); xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR,a3_buf); LOG_DEBUG("A3[0]=%X",a3_buf[0]); LOG_DEBUG("A3[1]=%X",a3_buf[1]); LOG_DEBUG("A3[2]=%X",a3_buf[2]); LOG_DEBUG("A3[3]=%X",a3_buf[3]); xtensa_queue_dbg_reg_write(xtensa, XDMREG_DDR, 0x5a5a8080); xtensa_queue_dbg_reg_read(xtensa, XDMREG_DDR,a3_buf); LOG_DEBUG("A3[0]=%X",a3_buf[0]); LOG_DEBUG("A3[1]=%X",a3_buf[1]); LOG_DEBUG("A3[2]=%X",a3_buf[2]); LOG_DEBUG("A3[3]=%X",a3_buf[3]); } /************************************************************************************/ I put the above test function in a lot of event locations like xtensa_halt/xtensa_resume/xtensa_prepare_resume and other places. Then I found that the DDR test always fails, bit31 is always 1, bit30 is always 0, such as the above result: 0x12345678----->0x82345678 0x0---->0x8000000 0x5a5a8080--->9a5a8080 I tried to modify the speed of jlink can not improve this, below is my cfg file, can you help me find out the reason? Here is my cfg file: /************************************xxxx.cfg************************************************/ adapter driver jlink adapter serial 601012352 transport select jtag gdb_port 20005 bindto 0.0.0.0 source [find mem_helper.tcl] set _CHIPNAME plmp set _CPU0NAME smcu set _CPU1NAME pmcu set _TARGETNAME_0 $_CHIPNAME.$_CPU0NAME set _TARGETNAME_1 $_CHIPNAME.$_CPU1NAME set _CPUTAPID 0x6ba00477 source [find target/swj-dp.tcl] swj_newdap $_CHIPNAME tap -irlen 4 -expected-id $_CPUTAPID dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.tap target create $_CHIPNAME.axi mem_ap -dap $_CHIPNAME.dap -ap-num 1 target create $_TARGETNAME_0 xtensa -dap $_CHIPNAME.dap -ap-num 0 -coreid 1 -dbgbase 0x0108000 source [find target/xtensa-core-lx7.cfg] target create $_TARGETNAME_1 xtensa -dap $_CHIPNAME.dap -ap-num 0 -coreid 2 -dbgbase 0x010c000 source [find target/xtensa-core-lx7.cfg] --- Sent from sourceforge.net because openocd-devel@lists.sourceforge.net is subscribed to https://sourceforge.net/p/openocd/tickets/ To unsubscribe from further messages, a project admin can change settings at https://sourceforge.net/p/openocd/admin/tickets/options. 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