This is an automated email from Gerrit.
"zapb <d...@zapb.de>" just uploaded a new patch set to Gerrit, which you can
find at https://review.openocd.org/c/openocd/+/8647
-- gerrit
commit b811fd567c7cc7b44e4cece9a6eaadf170bbfbd4
Author: Marc Schink <d...@zapb.de>
Date: Fri Dec 13 07:14:02 2024 +0000
flash/nor/stm32l4x: Add support for STM32U0 series
Tested flash programming / erasing and write protection feature on the
STM32U083RC microcontroller.
Change-Id: I3af51452f76d1f046d34d61b22d51abe2d0db3e8
Signed-off-by: Marc Schink <d...@zapb.de>
diff --git a/src/flash/nor/stm32l4x.c b/src/flash/nor/stm32l4x.c
index d66a83dd34..58d7c1b5a4 100644
--- a/src/flash/nor/stm32l4x.c
+++ b/src/flash/nor/stm32l4x.c
@@ -120,6 +120,12 @@
* http://www.st.com/resource/en/reference_manual/dm00346336.pdf
*/
+/* STM32U0xxx series for reference.
+ *
+ * RM0503 (STM32U0xx)
+ *
https://www.st.com/resource/en/reference_manual/rm0503-stm32u0-series-advanced-armbased-32bit-mcus-stmicroelectronics.pdf
+ */
+
/* STM32U5xxx series for reference.
*
* RM0456 (STM32U5xx)
@@ -278,7 +284,7 @@ struct stm32l4_wrp {
};
/* human readable list of families this drivers supports (sorted
alphabetically) */
-static const char *device_families = "STM32C0/G0/G4/L4/L4+/L5/U5/WB/WL";
+static const char *device_families = "STM32C0/G0/G4/L4/L4+/L5/U0/U5/WB/WL";
static const struct stm32l4_rev stm32l47_l48xx_revs[] = {
{ 0x1000, "1" }, { 0x1001, "2" }, { 0x1003, "3" }, { 0x1007, "4" }
@@ -325,6 +331,10 @@ static const struct stm32l4_rev stm32g0b_g0cxx_revs[] = {
{ 0x1000, "A" },
};
+static const struct stm32l4_rev stm32u0xx_revs[] = {
+ { 0x1000, "A" },
+};
+
static const struct stm32l4_rev stm32g43_g44xx_revs[] = {
{ 0x1000, "A" }, { 0x2000, "B" }, { 0x2001, "Z" },
};
@@ -600,6 +610,30 @@ static const struct stm32l4_part_info stm32l4_parts[] = {
.otp_base = 0x1FFF7000,
.otp_size = 1024,
},
+ {
+ .id = DEVID_STM32U031XX,
+ .revs = stm32u0xx_revs,
+ .num_revs = ARRAY_SIZE(stm32u0xx_revs),
+ .device_str = "STM32U031xx",
+ .max_flash_size_kb = 32,
+ .flags = F_NONE,
+ .flash_regs_base = 0x40022000,
+ .fsize_addr = 0x1FFF3EA0,
+ .otp_base = 0x1FFF6800,
+ .otp_size = 1024,
+ },
+ {
+ .id = DEVID_STM32U073_U083XX,
+ .revs = stm32u0xx_revs,
+ .num_revs = ARRAY_SIZE(stm32u0xx_revs),
+ .device_str = "STM32U073/U083xx",
+ .max_flash_size_kb = 256,
+ .flags = F_NONE,
+ .flash_regs_base = 0x40022000,
+ .fsize_addr = 0x1FFF6EA0,
+ .otp_base = 0x1FFF6800,
+ .otp_size = 1024,
+ },
{
.id = DEVID_STM32U59_U5AXX,
.revs = stm32u59_u5axx_revs,
@@ -2069,6 +2103,13 @@ static int stm32l4_probe(struct flash_bank *bank)
num_pages = flash_size_kb / page_size_kb;
stm32l4_info->bank1_sectors = num_pages;
break;
+ case DEVID_STM32U031XX:
+ case DEVID_STM32U073_U083XX:
+ /* single bank flash */
+ page_size_kb = 2;
+ num_pages = flash_size_kb / page_size_kb;
+ stm32l4_info->bank1_sectors = num_pages;
+ break;
case DEVID_STM32WB5XX:
case DEVID_STM32WB3XX:
/* single bank flash */
diff --git a/src/flash/nor/stm32l4x.h b/src/flash/nor/stm32l4x.h
index 5f3bc26576..b1e8f9870d 100644
--- a/src/flash/nor/stm32l4x.h
+++ b/src/flash/nor/stm32l4x.h
@@ -91,6 +91,7 @@
#define DEVID_STM32C03XX 0x453
#define DEVID_STM32U53_U54XX 0x455
#define DEVID_STM32G05_G06XX 0x456
+#define DEVID_STM32U031XX 0x459
#define DEVID_STM32G07_G08XX 0x460
#define DEVID_STM32L49_L4AXX 0x461
#define DEVID_STM32L45_L46XX 0x462
@@ -105,6 +106,7 @@
#define DEVID_STM32G49_G4AXX 0x479
#define DEVID_STM32U59_U5AXX 0x481
#define DEVID_STM32U57_U58XX 0x482
+#define DEVID_STM32U073_U083XX 0x489
#define DEVID_STM32WBA5X 0x492
#define DEVID_STM32WB1XX 0x494
#define DEVID_STM32WB5XX 0x495
--
