This is an automated email from Gerrit.
"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which
you can find at https://review.openocd.org/c/openocd/+/8690
-- gerrit
commit adb1b15af44070301540e14316501d33cb2496b1
Author: Tomas Vanek <van...@fbl.cz>
Date: Fri Jan 3 18:23:07 2025 +0100
target/arm_adi: add URLs of latest ARM ADI spec
While on it warn about screwed SWD diagrams in ADI spec
and add reference to a SWD timing diagram.
Change-Id: I628d707ebf8ce7c22ba19bdcfd06028d4eaa60f8
Signed-off-by: Tomas Vanek <van...@fbl.cz>
diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c
index 0c7633beab..dc65fb1f51 100644
--- a/src/target/arm_adi_v5.c
+++ b/src/target/arm_adi_v5.c
@@ -50,8 +50,16 @@
/*
* Relevant specifications from ARM include:
*
- * ARM(tm) Debug Interface v5 Architecture Specification ARM IHI 0031F
+ * ARM(tm) Debug Interface v5 Architecture Specification ARM IHI 0031G
+ * https://developer.arm.com/documentation/ihi0031/latest/
+ *
* ARM(tm) Debug Interface v6 Architecture Specification ARM IHI 0074C
+ * https://developer.arm.com/documentation/ihi0074/latest/
+ *
+ * Note that diagrams B4-1 to B4-7 in both ADI specifications show
+ * SWCLK signal mostly in wrong polarity. See detailed SWD timing
+ *
https://developer.arm.com/documentation/dui0499/b/arm-dstream-target-interface-connections/swd-timing-requirements
+ *
* CoreSight(tm) v1.0 Architecture Specification ARM IHI 0029B
*
* CoreSight(tm) DAP-Lite TRM, ARM DDI 0316D
--
