[PATCH]: 12bb0d61c7 target/riscv: return ERROR_BREAKPOINT_NOT_SET_TRY_NEXT_SMP_CORE

[gerrit]

This is an automated email from Gerrit.

"Tomas Vanek <van...@fbl.cz>" just uploaded a new patch set to Gerrit, which 
you can find at https://review.openocd.org/c/openocd/+/9126

-- gerrit

commit 12bb0d61c7da510480a71f64dd9f3d485e3bec6e
Author: Tomas Vanek <van...@fbl.cz>
Date:   Sat Sep 13 12:19:06 2025 +0200

    target/riscv: return ERROR_BREAKPOINT_NOT_SET_TRY_NEXT_SMP_CORE
    
    in case of adding soft breakpoint on an unavailable core.
    
    Change-Id: I50ac03a8f57fda319b2ab4ecb9d8b613a4d82f91
    Signed-off-by: Tomas Vanek <van...@fbl.cz>

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
index 7ef875f805..99077b211e 100644
--- a/src/target/riscv/riscv.c
+++ b/src/target/riscv/riscv.c
@@ -1621,6 +1621,12 @@ static int riscv_add_breakpoint(struct target *target, 
struct breakpoint *breakp
                        return ERROR_FAIL;
                }
 
+               if (target->state == TARGET_UNAVAILABLE) {
+                       /* try to set the breakpoint on other core of SMP group 
*/
+                       LOG_TARGET_DEBUG(target, "unavailable, will try other 
SMP cores");
+                       return ERROR_BREAKPOINT_NOT_SET_TRY_NEXT_SMP_CORE;
+               }
+
                /* Read the original instruction. */
                if (riscv_read_by_any_size(
                                target, breakpoint->address, 
breakpoint->length, breakpoint->orig_instr) != ERROR_OK) {

--