This is an automated email from Gerrit. "Tomas Vanek <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9144
-- gerrit commit 4ed9cdfdbc11427fa133fb99535d9e4a7d8a7d14 Author: Mark Zhuang <[email protected]> Date: Fri May 16 11:06:10 2025 +0800 target/riscv: fix get mode filed for vsatp and hgatp Imported from https://github.com/riscv-collab/riscv-openocd/pull/1258 Add the necessary get_filed and add a comment to indicate this section is for VU/VS mode Checkpatch-ignore: NO_AUTHOR_SIGN_OFF Change-Id: I898bba6250258c5076a98eb95411fcabccc52b96 Signed-off-by: Tomas Vanek <[email protected]> diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c index a52e0b9237..895550f0ab 100644 --- a/src/target/riscv/riscv.c +++ b/src/target/riscv/riscv.c @@ -3045,6 +3045,8 @@ static int riscv_mmu(struct target *target, bool *enabled) unsigned int xlen = riscv_xlen(target); if (v_mode) { + /* In VU or VS mode, MMU is considered enabled when + * either hgatp or vsatp mode is not OFF */ riscv_reg_t vsatp; if (riscv_reg_get(target, &vsatp, GDB_REGNO_VSATP) != ERROR_OK) { LOG_TARGET_ERROR(target, "Failed to read vsatp register; priv=0x%" PRIx64, @@ -3052,7 +3054,7 @@ static int riscv_mmu(struct target *target, bool *enabled) return ERROR_FAIL; } /* vsatp is identical to satp, so we can use the satp macros. */ - if (RISCV_SATP_MODE(xlen) != SATP_MODE_OFF) { + if (get_field(vsatp, RISCV_SATP_MODE(xlen)) != SATP_MODE_OFF) { LOG_TARGET_DEBUG(target, "VS-stage translation is enabled."); *enabled = true; return ERROR_OK; @@ -3064,7 +3066,7 @@ static int riscv_mmu(struct target *target, bool *enabled) priv); return ERROR_FAIL; } - if (RISCV_HGATP_MODE(xlen) != HGATP_MODE_OFF) { + if (get_field(hgatp, RISCV_HGATP_MODE(xlen)) != HGATP_MODE_OFF) { LOG_TARGET_DEBUG(target, "G-stage address translation is enabled."); *enabled = true; } else { --
