This is an automated email from Gerrit. "Tomas Vanek <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9209
-- gerrit commit f833247b9e73556aea6661d39f78207e291a3923 Author: Tomas Vanek <[email protected]> Date: Sun Nov 2 07:52:02 2025 +0100 target/arm_dpm: report vector catch as breakpoint Commit 4afa32ece148 ("aarch64: unify armv7-a and armv8 debug entry decoding") probably unintentionally removed DSCR_ENTRY_VECT_CATCH from reported debug entry reasons. Note the discrepancy between 'case DSCR_ENTRY_BKPT_INSTR:' and its comment. Hitting vector catch was reported as DBG_REASON_UNDEFINED. DBG_REASON_UNDEFINED disturbed hwthread/gdb cooperation and gdb reported the wrong thread as stopped by SIGTRAP. Revert to the original functionality and report vector catch as a breakpoint. Change-Id: I12e938182cff8f633decba340000cfbb7b112ae3 Signed-off-by: Tomas Vanek <[email protected]> diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index 26e32591a9..63c41c5835 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -1064,7 +1064,8 @@ void arm_dpm_report_dscr(struct arm_dpm *dpm, uint32_t dscr) target->debug_reason = DBG_REASON_DBGRQ; break; case DSCR_ENTRY_BREAKPOINT: /* HW breakpoint */ - case DSCR_ENTRY_BKPT_INSTR: /* vector catch */ + case DSCR_ENTRY_BKPT_INSTR: /* SW BKPT */ + case DSCR_ENTRY_VECT_CATCH: /* vector catch */ target->debug_reason = DBG_REASON_BREAKPOINT; break; case DSCR_ENTRY_IMPRECISE_WATCHPT: /* asynch watchpoint */ --
