This is an automated email from Gerrit. "Lazar Aleksic <[email protected]>" just uploaded a new patch set to Gerrit, which you can find at https://review.openocd.org/c/openocd/+/9751
-- gerrit commit 7b7f082564fc7ca9a5c5602209d32b0dcb578416 Author: Lazar Aleksic <[email protected]> Date: Tue Jun 23 01:04:31 2026 +0200 target/oocd_capstone: add Xtensa and ARC support for capstone v6 Capstone v6 adds support for Xtensa and ARC architectures. Add entries to the all_archs[] table under the CS_API_MAJOR >= 6 block so they are available when building against capstone v6. Xtensa entries cover ESP32, ESP32-S2, and ESP8266 variants. ARC uses little-endian mode as default. Guarded with #if defined(CS_ARCH_XTENSA) and #if defined(CS_ARCH_ARC) for backward compatibility with earlier v6 alphas that may lack these. Change-Id: I631070ffde337b4113af59050183a6210639764e Signed-off-by: Lazar Aleksic <[email protected]> diff --git a/src/target/oocd_capstone.c b/src/target/oocd_capstone.c index b321bee021..0d9451552e 100644 --- a/src/target/oocd_capstone.c +++ b/src/target/oocd_capstone.c @@ -51,6 +51,14 @@ static struct { { "arm64be", CS_ARCH_AARCH64, CS_MODE_BIG_ENDIAN }, { "riscv32", CS_ARCH_RISCV, CS_MODE_RISCV32 | CS_MODE_RISCV_C }, { "riscv64", CS_ARCH_RISCV, CS_MODE_RISCV64 | CS_MODE_RISCV_C }, +#if defined(CS_ARCH_XTENSA) + { "xtensa", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32 }, + { "xtensa_s2", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP32S2 }, + { "xtensa_8266", CS_ARCH_XTENSA, CS_MODE_XTENSA_ESP8266 }, +#endif +#if defined(CS_ARCH_ARC) + { "arc", CS_ARCH_ARC, CS_MODE_LITTLE_ENDIAN }, +#endif #endif /* CS_API_MAJOR >= 6 */ }; --
