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"liangzhen <[email protected]>" just uploaded a new patch set to Gerrit, 
which you can find at https://review.openocd.org/c/openocd/+/9755

-- gerrit

commit bb099deede6a1b2a932b2d188cb0515bf2625001
Author: Zane Leung <[email protected]>
Date:   Wed Jun 24 18:26:01 2026 +0800

    target/riscv: add hart index bounds checking
    
    dm013_select_hart() writes to dmcontrol.hartsel which is WARL.
    Prevent attempting to access a hart that don't exist on the
    debug module. Add coreid validation against actual hart count.
    
    Change-Id: If3638eb9fd3ff8f60018c070b3c024d1c5579787
    Signed-off-by: Zane Leung <[email protected]>

diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
index c7e068b394..953ca64fb0 100644
--- a/src/target/riscv/riscv-013.c
+++ b/src/target/riscv/riscv-013.c
@@ -1958,10 +1958,16 @@ static int examine_dm(struct target *target)
                 DM_DMCONTROL_HARTSELLO_LENGTH) |
                get_field(dmcontrol, DM_DMCONTROL_HARTSELLO);
 
+       if ((uint32_t)target->coreid > hartsel) {
+               LOG_TARGET_ERROR(target, "No hart with index %u does not exist. 
There"
+                       " are only %u harts found on the DM (with indexes 0 .. 
%u)",
+                       target->coreid, hartsel + 1, hartsel);
+               return ERROR_FAIL;
+       }
+
        /* Before doing anything else we must first enumerate the harts. */
-       const int max_hart_count = MIN(RISCV_MAX_HARTS, hartsel + 1);
        if (dm->hart_count < 0) {
-               for (int i = 0; i < max_hart_count; ++i) {
+               for (unsigned int i = 0; i <= hartsel; ++i) {
                        /* TODO: This is extremely similar to
                         * riscv013_get_hart_state().
                         * It would be best to reuse the code.
diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h
index 2a0a9b95f0..ff584e140a 100644
--- a/src/target/riscv/riscv.h
+++ b/src/target/riscv/riscv.h
@@ -17,7 +17,6 @@ struct riscv_program;
 
 #define RISCV_COMMON_MAGIC     0x52495356U
 
-#define RISCV_MAX_HARTS  ((int)BIT(20))
 #define RISCV_MAX_TRIGGERS 32
 #define RISCV_MAX_HWBPS 16
 #define RISCV_MAX_DMS 100

-- 

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