Index: src/target/arm7_9_common.c
===================================================================
--- src/target/arm7_9_common.c	(revision 723)
+++ src/target/arm7_9_common.c	(working copy)
@@ -789,8 +789,9 @@
 		else
 		{
 			/* program watchpoint unit to match on reset vector address */
+			embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE], 0x0);
 			embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK], 0x3);
-			embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0x0);
+			embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK], 0xffffffff);
 			embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0x100);
 			embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK], 0xf7);
 		}
@@ -855,6 +856,10 @@
 			 */
 			if (arm7_9->wp0_used)
 			{
+				if (arm7_9->debug_entry_from_reset)
+				{
+					embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_VALUE]);
+				}
 				embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_ADDR_MASK]);
 				embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_DATA_MASK]);
 				embeddedice_store_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_MASK]);
@@ -980,7 +985,7 @@
 		else
 		{
 			/* we came here in a reset_halt or reset_init sequence
-			 * debug entry was already prepared in arm7_9_prepare_reset_halt()
+			 * debug entry was already prepared in arm7_9_assert_reset()
 			 */
 			target->debug_reason = DBG_REASON_DBGRQ;