This looks OK to me, though I haven't tested it. Any objections to committing?
On Wed, Jun 25, 2008 at 10:55 AM, Jonas Horberg <[EMAIL PROTECTED]> wrote: > Hi list, > > I had a problem with the reset_halt mode on two different platforms both > with seperate TRST and SRST , one with a NXP LH79520 (ARM720T core) MCU and > one with a Samsung S3C44B0X (ARM7TDMI core) MCU. The targets did not halt > after the SRST was deasserted. After investigation I found that the > registers of the watchpoint unit was not fully setup to halt the target at > the reset vector. > > The attached patch add setup of the address value register for a break at > address zero and the data mask register setup is changed so the data is > disregarded. > Observe that the arm7_9->debug_entry_from_reset flag do not seem to be set > by any function. Should debug_entry_from_reset and the unexercised code be deleted? -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
