Øyvind Harobe had previously asked:
Are there any willing testers out there for OpenOCD Tcl scripting?
====== ====== ====== ====== ====== ======Attached is a *far* larger and *far* more complete patch for Jim/TCL - w/ OpenOCD.
that fixes many problems and extends Jim/TCL a bit. --Duane Ellis.Attached files are:
===================== CHANGELOG_for_SVN.gz ===================== A roughly 'changelog' format list of changes. You can use these to review the changes and for commentary during SVN commit. ===================== openocd-big-tcljim-patch.gz ===================== A large patch - (to SVN HEAD) that fixes many problems with JIM.Major highlights are: [This was part of my previous patch, which is re-included here]
(1) This did not work:
puts [format "0x%08x" 0x1234]
(2) This did not work:
puts [format "%d %d" 123 456]
(3) The only thing that worked was: "%s" and "%c" and "%d"
And you could only have 1 "%" item in the string.
(4) Output from TCL commands did not goto the "command window"
Example - in GDB type: mon puts "Hello world"
Example - in TELNET type: puts "Hello world"
Now, output from TCL works as you would expect.
=====================
src_tcl.tar.gz
=====================
NOTE: I hope to have some more TCL files shortly to do some more - ie: wiggle
GPIO pins from the script.
Øyvind Harobe had previously asked:
Are there any willing testers out there for OpenOCD Tcl scripting?
So I tried lots of stuff. Having written *LOTS* of Tcl/Tk stuff in the
past...[google: duane ellis insight] I found many basic bugs with the Tcl/Tk
JIM implimentation - 99% fixed above There are still lingering problems with
JIM - BTW - how can we fit SPOCK, BONES, and crew into this?
In the attached "src_tcl.tar.gz" file are many TCL scripts that implement
helper functions that only begin to display the ASIC registers in some of the Atmel SAM7
parts.
These of course - require the above fixes to Jim and the new C/TCL/Jim function
to work.
To try them out - (a) apply the patch (b) drop these files into the
${openocd}/src/tcl directory.
Build - and install.
Assuming you have a target you can talk to - it does not need to be a SAM7 ...
it would help... but it should work provided the target memory can be read at
the address... and does not abort.
NOTE: MOST ARMS (AR7/ARM9) (not cortex) have their interrupt controller at the
end of memory in about the same place - it should work - but you'll get wacky
looking numbers, but you'll get a feel for how well it works.
Do the following:
After you have attached to the target, type this command in GDB (or TELNET)
Step 1:
(gdb) mon source [find tcl/chip/atmel/at91/at91sam7x256.tcl]
Step 2:
(gdb) mon show_AIC
There are *MANY* other "show_THINGS" - see the file:
src_tcl.tar.gz(README) for details about TCL
And - a short intro to tcl and how I made these things work.
The "show_AIC" is a TCL command that reads the interrupt controller and displays
the state of various registers. A very helpful thing.
If you have ever used commercial development tools - this is a common feature
ie: Blackfin tools
ie: IAR tools
ie: Many 8051 tools.
There is no place to do this sort of stuff in GDB.
(gdb) mon show_AIC
AIC_SMR: Mode & Type
0: FIQ 0x00000000 | 1: SYS 0x00000000 | 2: PIOA 0x00000000 | 3:
PIOB 0x00000000
4: SPI0 0x00000000 | 5: SPI1 0x00000000 | 6: US0 0x00000000 | 7:
US1 0x00000000
8: SSC 0x00000000 | 9: TWI 0x00000000 | 10: PWMC 0x00000000 | 11:
UDP 0x00000000
12: TC0 0x00000020 | 13: TC1 0x00000000 | 14: TC2 0x00000000 | 15:
CAN 0x00000000
16: EMAC 0x00000000 | 17: ADC 0x00000000 | 18: 0x00000000 | 19:
0x00000000
20: 0x00000000 | 21: 0x00000000 | 22: 0x00000000 | 23:
0x00000000
24: 0x00000000 | 25: 0x00000000 | 26: 0x00000000 | 27:
0x00000000
28: 0x00000000 | 29: 0x00000000 | 30: IRQ0 0x00000000 | 31:
IRQ1 0x00000000
AIC_SVR: Vectors
0: FIQ 0x002014fc | 1: SYS 0x00201508 | 2: PIOA 0x00201508 | 3:
PIOB 0x00201508
4: SPI0 0x00201508 | 5: SPI1 0x00201508 | 6: US0 0x00201508 | 7:
US1 0x00201508
8: SSC 0x00201508 | 9: TWI 0x00201508 | 10: PWMC 0x00201508 | 11:
UDP 0x00201508
12: TC0 0x00201508 | 13: TC1 0x00201508 | 14: TC2 0x00201508 | 15:
CAN 0x00201508
16: EMAC 0x00201508 | 17: ADC 0x00201508 | 18: 0x00201508 | 19:
0x00201508
20: 0x00000000 | 21: 0x00000000 | 22: 0x00000000 | 23:
0x00000000
24: 0x00000000 | 25: 0x00000000 | 26: 0x00000000 | 27:
0x00000000
28: 0x00000000 | 29: 0x00000000 | 30: IRQ0 0x00201508 | 31:
IRQ1 0x00000000
AIC_IVR: (0xfffff100): 0x002014f0
AIC_FVR: (0xfffff104): 0x002014f0
AIC_ISR: (0xfffff108): 0x00000000
AIC_IPR: (0xfffff10c): 0x00000000
31: IRQ1 | 30: IRQ0 | 29: | 28: | 27: | 26: | 25: | 24: |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
23: | 22: | 21: | 20: | 19: | 18: | 17: ADC | 16: EMAC |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
15: CAN | 14: TC2 | 13: TC1 | 12: TC0 | 11: UDP | 10: PWMC | 9: TWI | 8: SSC |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
7: US1 | 6: US0 | 5: SPI1 | 4: SPI0 | 3: PIOB | 2: PIOA | 1: SYS | 0: FIQ |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
AIC_IMR: (0xfffff110): 0x00000000
31: IRQ1 | 30: IRQ0 | 29: | 28: | 27: | 26: | 25: | 24: |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
23: | 22: | 21: | 20: | 19: | 18: | 17: ADC | 16: EMAC |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
15: CAN | 14: TC2 | 13: TC1 | 12: TC0 | 11: UDP | 10: PWMC | 9: TWI | 8: SSC |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
7: US1 | 6: US0 | 5: SPI1 | 4: SPI0 | 3: PIOB | 2: PIOA | 1: SYS | 0: FIQ |
0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |
AIC_CISR: (0xfffff114): 0x00000000
AIC_IECR: (0xfffff120): 0x00000000 AIC_IDCR: (0xfffff124): 0x00000000 AIC_ICCR: (0xfffff128): 0x00000000 AIC_ISCR: (0xfffff12c): 0x00000000 AIC_EOICR: (0xfffff130): 0x00000000 AIC_SPU: (0xfffff134): 0x002014f0 AIC_DCR: (0xfffff138): 0x00000001 AIC_FFER: (0xfffff140): 0x00000000 AIC_FFDR: (0xfffff144): 0x00000000 AIC_FFSR: (0xfffff148): 0x00000000(gdb)
CHANGELOG_for_SVN.gz
Description: application/gzip
openocd-big-tcljim-patch.gz
Description: application/gzip
src_tcl.tar.gz
Description: application/gzip
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