> Some points to consider: > > - from the (knowing) user's point of view, there is a difference between a > failed reset+halt and a reset+run&halt, especially when a target is supposed > to support reset+halt. At a minimum the user needs to be informed about a > failed reset+halt.
The idea is indeed to print out a message, as today. A init script for a target where reset halt can fail must be written with this in mind(before and now). > - multiple targets on a single chain make reset a lot more difficult - not > sure how this works these days, but if you're going to rework reset anyway, > this might be worth some extra care. The input I've seen is that multiple devices in a chain, only one of which is an ARM CPU can make any fixed scheme for reset fail. Rather I'm thinking that a reset procedure needs to be written in script form to handle the more contrived cases. The current reset scheme is pretty decent(based on feedback) w.r.t. handling the various ARM targets out there. -- Øyvind Harboe http://www.zylin.com/zy1000.html ARM7 ARM9 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
