Hi,
I use the latest version of openocd (rev. 1293) and I try to use it with the
at91sam9261-ek and a jlink (v 7.0) in Fedora 8.
I try to debug on SDRAM and it works but very slow (jtag_khz 30).
I replace jtag_khz by jtag_rclk. Again, nothing change the download speed is
exactly the same. (near 8 sec for 4K of code and data!!!!)
I also try script at91sam9260.cfg from the lib/openocd/target and modify some
stuffs to fit my configuration.
But there are some issues :
1) So is it possible to dynamically change the speed of the jlink JTAG tap?
( exemple :
jtag_khz 30
# Configure PLL stuff
jtag_khz 10000
# Other configuration instructions like SDRAM, ...
)
I've try with the script and i get things like this :
*****************************************************************************************
#./openocd -f
../../../../projects/arch/arm9/at91sam9261/etc/scripts/at91sam9261.cfg
Open On-Chip Debugger 1.0 (2008-12-29-14:15) svn:1293
BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS
$URL: http://svn.berlios.de/svnroot/repos/openocd/trunk/src/openocd.c $
30 kHz
Info : J-Link ARM V7 compiled Dec 05 2008 20:14:17
Info : Vref = 3.280 TCK = 1 TDI = 0 TDO = 1 TMS = 0 SRST = 1 TRST = 1
Info : J-Link JTAG Interface ready
Info : JTAG tap: atsam9261.cpu tap/device found: 0x0792603f (Manufacturer:
0x01f, Part: 0x7926, Version: 0x0)
Info : JTAG Tap/device matched
Warn : no tcl port specified, using default port 6666
Info : accepting 'gdb' connection from 0
target state: halted
target halted in Thumb state due to debug-request, current mode: System
cpsr: 0x8000003f pc: 0x00001914
MMU: disabled, D-Cache: disabled, I-Cache: disabled
0xfffffc68: 0000000f
0xfffffc68: 0000000f
jtag_speed: 10000
dcc downloads are enabled
Warn : target not halted
Runtime error, file
"../../../../projects/arch/arm9/at91sam9261/etc/scripts/at91sam9261.cfg", line
22:
Warn : target not halted
Runtime error, file
"../../../../projects/arch/arm9/at91sam9261/etc/scripts/at91sam9261.cfg", line
1:
Warn : acknowledgment received, but no packet pending
Warn : target not halted
requesting target halt and executing a soft reset
Warn : TAP atsam9261.cpu:
Warn : value captured during scan didn't pass the requested check:
Warn : captured: 0x00 check_value: 0x01 check_mask: 0x0f
Warn : in_handler: w/o "in_value", mismatch in SIR
Warn : in_handler: w/o "in_value", mismatch in SIR
Warn : in_handler: w/o "in_value", mismatch in SIR
target state: halted
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x800000d3 pc: 0x00000000
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Warn : in_handler: w/o "in_value", mismatch in SIR
force soft breakpoints
Error: Target not halted
Info : no working area available, falling back to memory writes
Warn : target not halted
Runtime error, file "command.c", line 456:
Error: Target not halted
Info : no working area available, falling back to memory writes
Warn : target not halted
Error: BUG: unknown debug reason: 0x0
Error: BUG: unknown debug reason: 0xf
Error: BUG: unknown debug reason: 0x0
*****************************************************************************************
and this is my config file [at91sam9261.cfg]
*****************************************************************************************
######################
# Target configuration
######################
# We add to the minimal configuration.
source [find /path/at91sam9261minimal.cfg]
#reset
#atsam9261.cpu configure -event halted {
# at reset chip runs at 32khz
#jtag_khz 30
#jtag_speed 30
# mww 0xfffffd08 0xa5000001
#Watchdog disable
# mww 0xfffffd44 0x00008000
#PLL settings
# mww 0xfffffc20 0x00000601
# sleep 20
# mdw 0xfffffc68 1
# sleep 20
# mdw 0xfffffc68 1
# sleep 10
# mww 0xfffffc30 0x00000001
# sleep 10
#}
#gdb-attach
atsam9261.cpu configure -event gdb-attach {
mww 0xfffffd08 0xa5000001
#Watchdog disable
mww 0xfffffd44 0x00008000
#PLL settings
mww 0xfffffc20 0x00000601
sleep 20
mdw 0xfffffc68 1
sleep 20
mdw 0xfffffc68 1
sleep 10
mww 0xfffffc30 0x00000001
sleep 10
# Now run at anything fast... ie: 10mhz!
# Increase JTAG Speed to 6 MHz
jtag_speed 10000
# Enable faster DCC downloads
arm7_9 dcc_downloads enable
#Init SDRAM
#Activate CS1 for SDRAM
mww 0xffffee30 0x00000002
#Upper 16 lines are data lines for SDRAM
mww 0xfffff870 0xffff0000
#Disable PIO for upper 16 bits
mww 0xfffff804 0xffff0000
#Initialize SDRAM controller
mww 0xffffea08 0x85227259
sleep 1
#
mww 0xffffea00 0x00000002
mdw 0x20000000 1
sleep 1
#
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
mww 0xffffea00 0x00000004
mdw 0x20000000 1
sleep 1
#
mww 0xffffea00 0x00000003
mww 0x20000020 0xcafedede
mww 0xffffea04 0x000002bf
mww 0xffffea00 0x00000000
mdw 0x20000000 1
#REMAP
mdw 0x00000000 1
mww 0x00000000 0x00000001
#
mdw 0x00000000 1
mww 0x00000000 0x00000001
mdw 0x00000000 1
mww 0x00000000 0x00000001
#
mww 0xffffef00 0x00000003
#AIC init
mww 0xfffff124 0xffffffff
#
sleep 1
mdw 0xfffff130 1
sleep 1
mdw 0xfffff130 1
sleep 1
mdw 0xfffff130 1
sleep 1
mdw 0xfffff130 1
sleep 1
mdw 0xfffff130 1
sleep 1
mdw 0xfffff130 1
sleep 1
mdw 0xfffff130 1
sleep 1
mdw 0xfffff130 1
# Set the processor mode
reg cpsr 0xd3
# reg pc 0x00000000
}
*****************************************************************************************
at91sam9261minimal.cfg
*****************************************************************************************
######################################
# Target: Atmel AT91SAM9261
######################################
telnet_port 4444
gdb_port 3333
# jlink interface
interface jlink
jtag_khz 30
reset_config trst_and_srst
#
jtag_nsrst_delay 200
jtag_ntrst_delay 200
#reset_config srst_only
reset_config trst_and_srst
#newtape
jtag newtap atsam9261 cpu -irlen 4 -ircapture 0x01 -irmask 0xf -expected-id
0x0792603f
#new target
target create atsam9261.cpu arm926ejs -endian little -chain-position
atsam9261.cpu -variant arm926ejs
# Internal sram1 memory
atsam9261.cpu configure -work-area-virt 0 -work-area-phys 0x20000000
-work-area-size 0x4000000 -work-area-backup 1
*****************************************************************************************
2) Why the load adress of my ELF code is 0x4000000 on openocd console, rather
than 0x20000000 (the adress put on gdb script with load_image)?
Thanks in advance for your future help.
BR, jjp
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