> > > If I enter this sequence the interrupts don't work until I > cycle the power. > > > target extended-remote localhost:3333 > mon halt > load > thbreak main > c > > If I enter this sequence they do work > > target extended-remote localhost:3333 > mon halt > load > mon cortex_m3 maskisr off > thbreak main > c > >
The DHCSR (Debug Halting Control and Status Register) only as such gets reset on a power on reset. Are you sure you have executed 'cortex_m3 maskisr on' then issued a reset - this will not change the interrupt mask - a power cycle will however. we could change the behaviour to always reset this bit - depends on general consensus. Cheers Spen _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
