Ok, I think perhaps it is working.  I'll have to do some further
testing to determine if this is indeed the case, but I did figure out
some things, I think.

On Tue, Jan 6, 2009 at 8:35 AM, Rick Altherr <[email protected]> wrote:
> It may not make a difference, but r717 is fairly old and many changes and
> fixes have been made in the meantime.  Please try with the current SVN trunk
> as it includes more debugging information when run with 'debug_level 3'.
>  Also, 'debug_level 3' should be the first line in your first config.

Ok, I've grabbed the latest version from SVN, installed the latest
FTDI drivers (libftd2xx 3.0.18), and sucessfully built OpenOCD under
Cygwin.

Also, I have "-d 3" on the command line, so I'm not sure that
'debug_level 3' is necessary in the config file.  However, I did
switch over to a monolithic configuration file that includes the
"standard" ones.  Here's the configuration file I am using:

========= Begin openocd.cfg =============
debug_level 3

# Use the Olimex JTAG Tiny A
source [find interface/olimex-jtag-tiny-a.cfg]

# Set the telnet port
telnet_port 4444

# Set the GDB port
gdb_port 3333

# Slow down the JTAG
jtag_khz 1500

# Connect to an LPC2148
set CPUTAPID 0x4f1f0f0f
source [find target/lpc2148.cfg
========= End openocd.cfg =============

I found I had to slow down the JTAG in order to get a consistent
readback of the tap/device.  If I use the default JTAG speed, I get a
readback of XXXX.  But when I slow it down to about 1.5MHz or less, it
consistently reads 0x4f1f0f0f.  This is parsed out as manufacturer:
0x787, Part: 0xf1f0, and Version: 0x4.  So first of all, the JTAG
speed is an issue.

Secondly, I noticed that the lpc2148.cfg file defaults to a CPUTAPID
of 0xffffffff, which I think is incorrect.  So I put in the CPUTAPID I
read back, and that seems to fix things.

So, I'm glad to discover that thusfar there is no board problems.
Though apparently the default JTAG speed is too fast.  I don't know
how to clean that up other than to use a shorter ribbon cable.  But
wigglers I've used on Freescale and Xilinx parts can run the JTAG
chain at 15MHz+ without any issues with long ribbon cables.  Then
again, I didn't design those boards :).

Just a few of final questions.

1.  How does one determine the proper CPUTAPID value for the
"-expected_id"?  Is this a trial and error thing?
2.  Why does the LPC2148 configuration file default CPUTAPID to
0xffffffff, when other targets have specific CPUTAPID values (i.e.
at91, zy1000, etc)?  Can the LPC2148 have a different expected id?
2.  Do people have to reduce their JTAG speeds, even for the Olimex
boards?  I copied mine from the Olimex schematic, and there weren't
any terminators, etc.  Should there be some series terminations to
help?

Thanks,
Pete
-- 
--
"To love for the sake of being loved is human;  to love for the sake
of loving is Angelic."  -- Alphonse de Lamartine
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