Hi everyone, I'm an experienced developer, but I'd have to say that I'm quite new to JTAG. The concepts are fairly clear, but I don't have enough experience debugging with JTAG to be able to make any predictions.
I've read the app note regarding isolation of the xscale nTRST nSRST pins, and I understand that nSRST needs to be held longer in order to properly initialize the boundary scan chain. On my device, which is based on the pxa270, the nTRST and nSRST are tied together to an nRESET_IN signal. That signal is tied to the hardware reset button, and it's not even brought out to the JTAG header. I'm basically given STD_TXD, STD_RXD, for a basic uart, and TDI, TDO, TMS, and TCK for jtag. It's a winCE device ... and apparently that's all that MicroSoft requires according to the official description of a 'debug port'. I'm working on porting Linux to my device in any event. What can I expect to do with the JTAG signals that I have? I would like to be able to * load / execute an arbitrary binary in ram (e.g. uBoot, Linux, memtest, uart_test) * reprogram the NOR / NAND flash devices Also, how can I tell where the cpu & flash devices are in the boundary scan chain ? Any help would be appreciated. Cheers, Chris _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
