Given your information and the code, the attached patch should work
around the problem, unless there are instructions not handled by the
following block of logic. I added output to see if that is the case.
Cheers,
Zach
On Tue, 2009-04-14 at 00:50 +0200, Magnus Lundin wrote:
> Hi,
>
> Is it possible to find out the exact assembly code that kills OpenOCD ?
> Let me guess that I could be an immediate shift or MOVS in thumb mode .
>
> I am not an expert on the single step PC prediction code in
> arm_simulate_step(target_t *target, u32 *dry_run_pc) but
> there are some tumb instructions that does not have an Rn argument.
>
> See arm_dissassembler.c:1444 in evaluate_shift_imm_thumb(u16 opcode,
> u32 address, arm_instruction_t *instruction)
> This will give a value of -1 for the register number
> instruction.info.data_proc.Rn at line 418 in arm_simulator.c .
>
> Regards,
> Magnus
>
>
> Ken Smith wrote:
> > On Mon, Apr 13, 2009 at 2:23 PM, Hermann Kraus <[email protected]> wrote:
> >
> >> On Mon, 13 Apr 2009 23:11:29 +0200, Ken Smith <[email protected]> wrote:
> >>
> >>> This crash kills openocd every time. Any ideas?
> >>>
> >> I have the same problem and one more person on this list also reported it.
> >> It crashes at exactly the same location. I hope someone fixes this soon, as
> >> I currently don't have the time to debug this problem.
> >>
> >> Here's the thread where I reported the problem:
> >> https://lists.berlios.de/pipermail/openocd-development/2009-April/005257.html
> >>
> >
> > Sorry for the duplication. I'm also keenly interested in a fix to
> > this. Is anyone out there working on this? (assume: usual
> > disclaimers about FOSS)
> >
> > Many thanks for the quick response.
> >
> > Warm regards,
> > Ken
> > _______________________________________________
> > Openocd-development mailing list
> > [email protected]
> > https://lists.berlios.de/mailman/listinfo/openocd-development
> >
>
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Index: src/target/arm_simulator.c
===================================================================
--- src/target/arm_simulator.c (revision 1454)
+++ src/target/arm_simulator.c (working copy)
@@ -415,7 +415,11 @@
u8 carry_out;
Rd = 0x0;
- Rn = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.data_proc.Rn).value, 0, 32);
+ if (instruction.type != ARM_MOV && instruction.type != ARM_MVN)
+ Rn = buf_get_u32(ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, armv4_5->core_mode, instruction.info.data_proc.Rn).value, 0, 32);
+ else
+ Rn = 0;
+
shifter_operand = arm_shifter_operand(armv4_5, instruction.info.data_proc.variant, instruction.info.data_proc.shifter_operand, &carry_out);
/* adjust Rn in case the PC is being read */
@@ -446,6 +450,8 @@
Rd = shifter_operand;
else if (instruction.type == ARM_MVN)
Rd = ~shifter_operand;
+ else
+ LOG_WARNING("unhandled instruction type");
if (dry_run_pc)
{
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