On Wed, 2009-04-22 at 11:50 -0700, Zach Welch wrote:
> Hi all,
>
> This is the second of the two patches provided by Jeff Williams,
> re-based against r1509. I have barely glanced through it for now, as
> the old patch simply had some fuzz in it. I thought I should try to
> re-post it to see if the community will start to do something with it
> (e.g. review it for TODOs).
>
> Do NOT apply, but please provide feedback or revised patches. Better,
> tell me that I can forget about this patch for the time being, because
> someone else is going to take some responsibility for it. :)
Now with the patch attached.
--Z
Index: src/target/embeddedice.c
===================================================================
--- src/target/embeddedice.c (revision 1509)
+++ src/target/embeddedice.c (working copy)
@@ -288,11 +288,17 @@
fields[0].in_value = reg->value;
jtag_set_check_value(fields+0, check_value, check_mask, NULL);
- /* when reading the DCC data register, leaving the address field set to
- * EICE_COMMS_DATA would read the register twice
- * reading the control register is safe
+// /* when reading the DCC data register, leaving the address field set to
+// * EICE_COMMS_DATA would read the register twice
+// * reading the control register is safe
+// */
+// buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
+ /*
+ * It turns out that on at least teh MC1322x it's not OK to read some other random register.
+ * Re-read the one requested!
+ * Beside, there's no reason to introduce risk even if it seems to work.
*/
- buf_set_u32(fields[1].out_value, 0, 5, embeddedice_reg_arch_info[EICE_COMMS_CTRL]);
+ buf_set_u32(fields[1].out_value, 0, 5, reg_addr);
jtag_add_dr_scan(3, fields, TAP_INVALID);
@@ -397,8 +403,13 @@
void embeddedice_write_reg(reg_t *reg, u32 value)
{
embeddedice_reg_t *ice_reg = reg->arch_info;
+ int i;
- LOG_DEBUG("%i: 0x%8.8x", ice_reg->addr, value);
+ for (i = 0; i<16; i++) {
+ if (embeddedice_reg_arch_info[i] == ice_reg->addr) {
+ LOG_DEBUG("reg: %s: val: 0x%8.8x", embeddedice_reg_list[i], value);
+ }
+ }
jtag_add_end_state(TAP_IDLE);
arm_jtag_scann(ice_reg->jtag_info, 0x2);
Index: src/target/arm7tdmi.c
===================================================================
--- src/target/arm7tdmi.c (revision 1509)
+++ src/target/arm7tdmi.c (working copy)
@@ -56,6 +56,16 @@
int arm7tdmi_poll(struct target_s *target);
int arm7tdmi_halt(target_t *target);
+/*
+ * When we "clock in" we have to put a rational instruction in the DRSHIFT "out", so that
+ * we don't change the EICE by leaving a junk instruction in the pipeline.
+ * These two values insert an outbound NOP and debug=0 whenever we otherwise specify nothing.
+ * N.B. It's global since NOP is different in Thumb and ARM modes.
+ */
+
+u8 default_debug_out_val = 0x0;
+u32 default_nop_out = 0x1001057; // is initialized to equivalent of: flip_u32(ARMV4_5_NOP, 32)
+
target_type_t arm7tdmi_target =
{
.name = "arm7tdmi",
@@ -201,7 +211,7 @@
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
- fields[0].out_value = NULL;
+ fields[0].out_value = &default_debug_out_val;
fields[0].out_mask = NULL;
fields[0].in_value = NULL;
fields[0].in_check_value = NULL;
@@ -211,7 +221,7 @@
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
- fields[1].out_value = NULL;
+ fields[1].out_value = (u8*) &default_nop_out;
fields[1].out_mask = NULL;
fields[1].in_value = NULL;
fields[1].in_handler = arm_jtag_buf_to_u32_flip;
@@ -223,13 +233,13 @@
jtag_add_runtest(0, TAP_INVALID);
+ if((retval = jtag_execute_queue()) != ERROR_OK)
+ {
+ return retval;
+ }
+
#ifdef _DEBUG_INSTRUCTION_EXECUTION_
{
- if((retval = jtag_execute_queue()) != ERROR_OK)
- {
- return retval;
- }
-
if (in)
{
LOG_DEBUG("in: 0x%8.8x", *in);
@@ -262,7 +272,7 @@
fields[0].tap = jtag_info->tap;
fields[0].num_bits = 1;
- fields[0].out_value = NULL;
+ fields[0].out_value = &default_debug_out_val;
fields[0].out_mask = NULL;
fields[0].in_value = NULL;
fields[0].in_check_value = NULL;
@@ -272,7 +282,7 @@
fields[1].tap = jtag_info->tap;
fields[1].num_bits = 32;
- fields[1].out_value = NULL;
+ fields[1].out_value = (u8*) &default_nop_out;
fields[1].out_mask = NULL;
fields[1].in_value = NULL;
switch (size)
@@ -316,6 +326,7 @@
return ERROR_OK;
}
+
void arm7tdmi_change_to_arm(target_t *target, u32 *r0, u32 *pc)
{
/* get pointers to arch-specific information */
@@ -323,6 +334,9 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ // Set the global "clocking in" NOP to a Thumb instruction
+ default_nop_out = flip_u32(ARMV4_5_T_NOP, 32);
+
/* save r0 before using it and put system in ARM state
* to allow common handling of ARM and THUMB debugging */
@@ -364,6 +378,10 @@
* reading PC in Thumb state gives address of instruction + 4
*/
*pc -= 0xa;
+
+ // Set the global "clocking in" NOP to an ARM instruction
+ default_nop_out = flip_u32(ARMV4_5_NOP, 32);
+
}
void arm7tdmi_read_core_regs(target_t *target, u32 mask, u32* core_regs[16])
@@ -513,6 +531,9 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ // On the MC1322x we crash into Thumb mode if we don't clear the pipeline before each op.
+ arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
+
/* LDMIA r0-15, [r0] at debug speed
* register values will start to appear on 4th DCLK
*/
@@ -539,6 +560,9 @@
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
arm_jtag_t *jtag_info = &arm7_9->jtag_info;
+ // On the MC1322x we crash into Thumb mode if we don't clear the pipeline before each op.
+ arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
+
/* put system-speed load-multiple into the pipeline */
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 0);
arm7tdmi_clock_out(jtag_info, ARMV4_5_NOP, NULL, 1);
Index: src/target/arm7_9_common.c
===================================================================
--- src/target/arm7_9_common.c (revision 1509)
+++ src/target/arm7_9_common.c (working copy)
@@ -1969,6 +1969,7 @@
{
armv4_5_common_t *armv4_5 = target->arch_info;
arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+ reg_t *dbg_stat = &arm7_9->eice_cache->reg_list[EICE_DBG_STAT];
u32 reg[16];
u32 num_accesses = 0;
@@ -1980,6 +1981,11 @@
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
+ // Debug investigation code - MC1322x is crashing into Thumb state and/or coming out of debug (DBGACK ==0).
+ embeddedice_read_reg(dbg_stat);
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ return retval;
+
if (target->state != TARGET_HALTED)
{
LOG_WARNING("target not halted");
@@ -2116,6 +2122,11 @@
break;
}
+ // Debug investigation code - MC1322x is crashing into Thumb state and/or coming out of debug (DBGACK ==0).
+ embeddedice_read_reg(dbg_stat);
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ return retval;
+
if (armv4_5_mode_to_number(armv4_5->core_mode)==-1)
return ERROR_FAIL;
@@ -2138,6 +2149,11 @@
return ERROR_TARGET_DATA_ABORT;
}
+ // Debug investigation code - MC1322x is crashing into Thumb state and/or coming out of debug (DBGACK ==0).
+ embeddedice_read_reg(dbg_stat);
+ if ((retval = jtag_execute_queue()) != ERROR_OK)
+ return retval;
+
return ERROR_OK;
}
_______________________________________________
Openocd-development mailing list
Openocd-development@lists.berlios.de
https://lists.berlios.de/mailman/listinfo/openocd-development
