How about adding the "sim" interface & target? The idea is to be able to run regression tests in software only.
Another piece to the puzzle is that GDB has a "target sim" for just about any CPU architecture. Outline of crazy idea follows: - add a "simarm" interface. This simarm interface implements a JTAG slave that OpenOCD talks to. - This JTAG slave controls a GDB running "target sim" For regression testing purposes, it would probably suffice to implement this for ARM, but it should work for MIPS too... Lots of blanks & questions in this idea. The biggest of which is who would pick up the gauntlet ;-) -- Øyvind Harboe Embedded software and hardware consulting services http://consulting.zylin.com _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
