On Sat, May 30, 2009 at 11:39 PM, Magnus Lundin <[email protected]> wrote:
> It looks like you are using  jtag_khz  0, this  means adaptive clocking with
> the RTCK signal. This work for LPC3148 that has a RTCK signal, but as far as
> I can find there is no RTCK singal on the  TMS470R1A256.
>
> For testing  interface problem I would suggest, always start with a slow
> jtag clock, like jtag_khz 30 or 100. If this works try to increase it.
>

I did not set jtag_khz. So 0 is the default, right?
Now it works! At least I can connect. Thanks a lot for the tip.

Do you know how to remove the warning?
"Warn : DBGACK set while target was in unknown state. Reset or
initialize target."

mc...@ubuntu904:~/Desktop/build/openocd/tms470$ openocd -f tms470r1a256.cfg
Open On-Chip Debugger 0.2.0-in-development (2009-05-30-16:36) svn:1948

BUGS? Read http://svn.berlios.de/svnroot/repos/openocd/trunk/BUGS

$URL: svn://svn.berlios.de/openocd/trunk/src/openocd.c $
30 kHz
using flash keys 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
osc_megahertz=12
plldis=0
Error: J-Link command EMU_CMD_VERSION failed (-110)

Info : J-Link ARM V6 compiled Apr  1 2009 11:56:10
Info : JLink caps 0x19ff7bbf
Info : JLink hw version 60000
Info : JLink max mem block 8832
Info : Vref = 3.132 TCK = 1 TDI = 0 TDO = 0 TMS = 0 SRST = 1 TRST = 1

Info : J-Link JTAG Interface ready
Info : JTAG tap: tms470r1a256.cpu tap/device found: 0x3100e02f
(Manufacturer: 0x017, Part: 0x100e, Version: 0x3)
Info : JTAG Tap/device matched
Warn : DBGACK set while target was in unknown state. Reset or initialize target.
target state: halted
target halted in ARM state due to breakpoint, current mode: Supervisor
cpsr: 0x000000d3 pc: 0x000002b4
Info : accepting 'telnet' connection from 0
30 kHz
Info : JTAG tap: tms470r1a256.cpu tap/device found: 0x3100e02f
(Manufacturer: 0x017, Part: 0x100e, Version: 0x3)
Info : JTAG Tap/device matched
^C

mc...@ubuntu904:~$ telnet localhost 4444
Trying ::1...
Trying 127.0.0.1...
Connected to localhost.
Escape character is '^]'.
Open On-Chip Debugger
> reset
30 kHz
JTAG tap: tms470r1a256.cpu tap/device found: 0x3100e02f (Manufacturer:
0x017, Part: 0x100e, Version: 0x3)
JTAG Tap/device matched
> Connection closed by foreign host.

Config file:
source [find interface/jlink.cfg]

#----------- Daemon Configuration

telnet_port     4444
gdb_port        3333
tcl_port        6666


# Tell gdb that you can use us to program the device (requires GDB
>=6.7 and libexapt)
gdb_memory_map    enable
gdb_flash_program enable

# Start slow, speed up after reset
jtag_khz 30

# TI TMS470R1A384

if { [info exists CHIPNAME] } { 
   set  _CHIPNAME $CHIPNAME
} else {        
   set  _CHIPNAME tms470r1a256
}

if { [info exists ENDIAN] } {   
   set  _ENDIAN $ENDIAN
} else {        
   set  _ENDIAN big
}

if { [info exists CPUTAPID ] } {
   set _CPUTAPID $CPUTAPID
} else {
  # force an error till we get a good number
   set _CPUTAPID 0x3100e02f
}

jtag_nsrst_delay 200
jtag_ntrst_delay 200

#use combined on interfaces or targets that can't set TRST/SRST separately
#reset_config trst_and_srst
reset_config trst_and_srst srst_pulls_trst

#jtag scan chain
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
-expected-id $_CPUTAPID

# The target
set _TARGETNAME [format "%s.cpu" $_CHIPNAME]
target create $_TARGETNAME arm7tdmi -endian $_ENDIAN -chain-position
$_TARGETNAME -variant arm7tdmi

$_TARGETNAME configure -event reset-start {
        jtag_khz 30
}

$_TARGETNAME configure -event reset-init {

    # Force target into ARM state.
    soft_reset_halt

    # disable illegal address reset
    mww 0xffffffe0 0x00004007
    #cs0 flash
    mww 0xfffffe04 0x00000000
    mww 0xfffffe00 0x00000000
    #cs1
    mww 0xfffffe08 0x00000000
    mww 0xfffffe0c 0x00000000
    #cs2 ram 0x00000000 32k
    mww 0xfffffe10 0x00000000
    mww 0xfffffe14 0x00000060
    #cs3 ram
    mww 0xfffffe18 0x00000000
    mww 0xfffffe1c 0x00000000
    #cs4 het
    mww 0xfffffe20 0x00000020
    mww 0xfffffe24 0x00000010

    # activate new mapping by writing 1 to MFBALR0.8
    mww 0xfffffe04 0x00000100

    # GCR SYSCLK *4 and /4 = SYSCLK  /1
    #mww 0xffffffdc 0x0000000b

    sleep 100

    jtag_khz 1500
}

$_TARGETNAME configure -work-area-virt 0 -work-area-phys 0x00200000
-work-area-size 0x4000 -work-area-backup 0

flash bank tms470 0x00000 0x20000 0 0 0
flash bank tms470 0x20000 0x20000 0 0 0
flash bank tms470 0x40000 0x20000 0 0 0
tms470 flash_keyset 0xffffffff 0xffffffff 0xffffffff 0xffffffff
tms470 osc_megahertz 12
tms470 plldis 0


-- 
Xiaofan http://mcuee.blogspot.com
_______________________________________________
Openocd-development mailing list
[email protected]
https://lists.berlios.de/mailman/listinfo/openocd-development

Reply via email to