> ... that's *IF* one task of that FPGA is implementing a CPU. > (And if it's not one of the FPGAs with on-chip storage for > that particular config bitstream.)
Really what is required is a target .cfg file for *each* FPGA bit file, just like a .cfg file is required for each target. An FPGA screws with our concept of "target hardware" because with an FPGA it could be anything. The "reset" tcl proc really is *very* CPU oriented. It doesn't make much sense to talk about resetting an FPGA into the halted state.... -- Øyvind Harboe Embedded software and hardware consulting services http://www.zylin.com _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
