> Based on some initial testing it looks like the what the code
> thinks the state of the JTAG state machine is verses what it
> is inside the processor are two different things following reset.
>
> There are some other relevant details about this board worthy to note.
> First this particular board only utilizes the system reset
> (SRST) signal.
> The test reset for the jtag port (TRST) is not physically
> connected to the emulator port on the PCB. Without pulling
> up the datasheet, I am going to assume therefore that
> actuation of SRST is also yanking the TRST signal internally.
>
> In the process of debugging I temporarily commented out the
> following steps in jlink_reset:
>
> // if (trst == 0)
> // {
> // jlink_simple_command(EMU_CMD_HW_TRST1);
> // jtag_sleep(5000);
> // jlink_end_state(TAP_RESET);
> // jlink_state_move();
> // }
>
I am seeing issues with the str9 using the jlink.
The fix for that is to comment out:
jtag_sleep(5000);
jlink_end_state(TAP_RESET);
jlink_state_move();
Going from the original jlink code i worked on i am not sure why these were
added?
Cheers
Spen
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