>
>> On Wednesday 15 July 2009, Øyvind Harboe wrote:
>> > I've made an attempt at bringing Magnus Cortex A8 work up
>> to SVN HEAD.
>> >
>> > It builds and I hope I resolved the few conflicts correctly. Not
>> > tested on Cortex M3 or A8.
>>
>> This splits the remaining work in two parts. It needs sanity
>> testing on A8 before merging. First part creates armv7m.c
>> and the second has the cortex_a8.c code. Changes are
>> primarily style cleanups, plus sorting Magnus' somewhat
>> rambling comments into patch descriptions.
>>
>> - Dave
>>
>
> Other than adding svn props for the new files looks ok.
>
> For info monitor mode is also available on all arm7/9/11 and cortex -S
> cores.
>
> Cheers
> Spen
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Many arm cores have a debug monitor, entered by a debug exception. The
Cortex-A8 Monitor mode is not a debug state, it is an operating mode with
ist own banked register r13 and r14. I have not seen this on any other ARM
family, it is not an operation mode in the ARMv4/5 core model.
>From the Cortex-A8 TRM (sec 2-12):
There are eight modes of operation:
User mode is the usual ARM program execution state, and is used for
executing
most application programs
Fast interrupt (FIQ) mode is used for handling fast interrupts
Interrupt (IRQ) mode is used for general-purpose interrupt handling
Supervisor mode is a protected mode for the OS
Abort mode is entered after a data abort or prefetch abort
System mode is a privileged user mode for the OS
Undefined mode is entered when an Undefined Instruction exception occurs
Monitor mode is a Secure mode for the Security Extensions Secure
Monitor c
Best regards
Magnus
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