> > Clean up treatment of registers in ARMv7-M and Cortex-M3. > > - At the arch level: > * Just list registers and names; don't impose core-specific > policy about how they are accessed. > * Each register has a symbol. > * Remove the register mode field (irrelevant to debugger) > > - At the core/implementation level: > * Just map the registers to their relevant access methods; > don't require the arch level to say how that should work > (cores other than Cortex-M3 could do it differently). > * Don't use undefined bits from register 20. > * Use register IDs that are part of the ARMv7-M interface. > > In short, there's now a real distinction between the arch and > core layers.
committed r2554 - nice work Slight change of topic but one thing i have been meaning to get fully working is the gdb qXfer:features:read packet - currently unused in openocd. It enables us to tell gdb that we are a cortex_m3 by sending the org.gnu.gdb.arm.core-v7m feature for example. It offers many other things such as we can add new registers to gdb. Codesourcery use it quite a bit in their tools. One stumbling block with openocd is that the registers as such are hardcoded - this would have to change. Have you ever looked into this? Cheers Spen _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
