Hi Øyvind, This is a resend patch. It only improves the description as Magnus suggested.
Cheers, Matt
>From b88fefc9c2d1711b32335a681f0731eae158f756 Mon Sep 17 00:00:00 2001 From: Matt Hsu <[email protected]> Date: Fri, 4 Sep 2009 15:43:31 +0800 Subject: [PATCH] [Cortex_A8] Enable-halt-debug-mode-for-cortex_a8 This patch simply enables the halting debug mode. By enabling this bit, the processor halts when a debug event such as breakpoint occurs. Signed-off-by: Matt Hsu <[email protected]> --- src/target/cortex_a8.c | 7 +++++++ 1 files changed, 7 insertions(+), 0 deletions(-) diff --git a/src/target/cortex_a8.c b/src/target/cortex_a8.c index a806669..6ef585c 100644 --- a/src/target/cortex_a8.c +++ b/src/target/cortex_a8.c @@ -430,6 +430,13 @@ int cortex_a8_halt(target_t *target) retval = mem_ap_write_atomic_u32(swjdp, OMAP3530_DEBUG_BASE + CPUDBG_DRCR, 0x1); + /* + * enter halting debug mode + */ + mem_ap_read_atomic_u32(swjdp, OMAP3530_DEBUG_BASE + CPUDBG_DSCR, &dscr); + retval = mem_ap_write_atomic_u32(swjdp, + OMAP3530_DEBUG_BASE + CPUDBG_DSCR, dscr | (1 << DSCR_HALT_DBG_MODE)); + if (retval != ERROR_OK) goto out; -- 1.6.0.4
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