On Mon, Sep 14, 2009 at 9:08 PM, michal smulski <[email protected]> wrote: > > If you are modifying srst behavior can you add functionality so that I > can define how long is the srst reset as well as how long after srst > pulse JTAG controller waits before initiating scan?
type "help delay". You can control the delay after deasserting srst / trst. Add "sleep N" to target's reset-assert-post event for a target and you can lengthen the srst/trst pulse. There isn't a way to control the width of those pulses individually though. -- Øyvind Harboe Embedded software and hardware consulting services http://www.zylin.com _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
