Paul Kurucz wrote: > Just a quick heads-up to anyone who is attempting to get the Numonyx > M29W128GH/L working with openocd. It appears the chip has an > unfortunate errata where sending a 0xFF command to it puts it off in > the weeds and fails to accept new commands until a 0xF0 is sent to put > it back into read mode. See the data sheet link below for more > detail. > Hm - so I am not the only one ;-)
I recently had similar trouble (outside OpenOCD) with Numonyx (Intel) JS28F256P33 flashs - the new chip revision which is touted as a "new release" of the same chip) will only accept the Intel-style reset command, while the previous revision accepted both reset commands. Now the wording in the CFI specs is not 100% clear, but my interpretation is that a flash should accept either reset command to exit CFI mode. However, with existing silicon in the wild that interpretation is probably moot ... I think the best solution is to use *only* the reset command that is "right" for the command set (Intel or AMD), instead of relying on ine version (which breaks on at least two chips now). This requires that the CFI layer knows about the flash type, but this should be manageable. cu Michael _______________________________________________ Openocd-development mailing list [email protected] https://lists.berlios.de/mailman/listinfo/openocd-development
