Hi,
I had problems with the "reset init" on LPC2478, too. I didn't analyze it
deeply, but I noticed this problem:
OpenOCD reported that it couldn't halt the target. With debug on, I got the
impression that the EmbeddedICE had been programmed for a break before the
final SRST/TRST happened. There was an attempt to reprogram it afterwards, but
that didn't seem to be complete.
I've added a call to jtag_add_tlr(), and that solved it for me.
All relevant EmbeddedICE registers are now reprogrammed.
It looks like there's some internal state which didn't notice that the target
hardware got a reset. Seems reasonable to me to have the TAP reset call here,
but I'm not an expert...
Regards,
Rolf
Index: src/target/arm7_9_common.c
===================================================================
--- src/target/arm7_9_common.c (revision 2731)
+++ src/target/arm7_9_common.c (working copy)
@@ -1105,6 +1105,9 @@
if (target->reset_halt && (jtag_reset_config & RESET_SRST_PULLS_TRST)
!= 0)
{
LOG_WARNING("srst pulls trst - can not reset into halted mode.
Issuing halt after reset.");
+
+ jtag_add_tlr();
+
/* set up embedded ice registers again */
if ((retval = target_examine_one(target)) != ERROR_OK)
return retval;
--- Freddie Chopin <[email protected]> schrieb am Mo, 21.9.2009:
> Von: Freddie Chopin <[email protected]>
> Betreff: Re: [Openocd-development] 0.3 anyone?
> An: "Øyvind Harboe" <[email protected]>
> CC: [email protected]
> Datum: Montag, 21. September 2009, 19:04
> Øyvind Harboe pisze:
> > Does anyone have a bunch of stuff that will be
> completed in the near future?
>
> How about that new LPC2xxx cfg files layout?
>
> With a bit of investigation the "reset init" should be
> working, or that
> can be left for future, as now this script is not fully
> functional either...
>
> 4\/3!!
> _______________________________________________
> Openocd-development mailing list
> [email protected]
> https://lists.berlios.de/mailman/listinfo/openocd-development
>
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