For testing and comments:
Uses the OMAP3530 global software reset and defines corresponding
reset-start and reset-end event handlers.
Best regards,
Magnus
===================================
.
.
# FIXME much of this should be in reset event handlers
proc omap3_dbginit { } {
poll off
sleep 100
jtag tapenable omap3530.dap
targets
# General Cortex A8 debug initialisation
cortex_a8 dbginit
# Enable DBGU singal for OMAP353x
omap3.cpu mww 0x5401d030 0x00002000
poll on
}
set PRM_RSTCTRL 0x48307250
proc omap3_reset { } {
# Global software reset
# RST_GS bit in PRM_RSTCTRL
mww $PRM_RSTCTRL 2
omap3_dbginit
halt
}
omap3.cpu configure -event reset-start "omap3.cpu mww $PRM_RSTCTRL 2"
omap3.cpu configure -event reset-end "omap3_dbginit"
Index: tcl/target/omap3530.cfg
===================================================================
--- tcl/target/omap3530.cfg (working copy)
+++ tcl/target/omap3530.cfg (revision 2768)
@@ -2,9 +2,9 @@
# http://focus.ti.com/docs/prod/folders/print/omap3530.html
# Other OMAP3 chips remove DSP and/or the OpenGL support
-if { [info exists CHIPNAME] } {
- set _CHIPNAME $CHIPNAME
-} else {
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
set _CHIPNAME omap3530
}
@@ -42,6 +42,7 @@
# FIXME much of this should be in reset event handlers
proc omap3_dbginit { } {
poll off
+ reset
sleep 100
jtag tapenable omap3530.dap
@@ -53,17 +54,3 @@
poll on
}
-set PRM_RSTCTRL 0x48307250
-
-proc omap3_reset { } {
- # Global software reset
- # RST_GS bit in PRM_RSTCTRL
- mww $PRM_RSTCTRL 2
- omap3_dbginit
- halt
-}
-
-omap3.cpu configure -event reset-start "omap3.cpu mww $PRM_RSTCTRL 2"
-omap3.cpu configure -event reset-end "omap3_dbginit"
-
-
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