arm7_9_write_core_regs did not update the core_cache and changes would
get clobbered by arm7_9_full_context.
This change updates the core_cache before writing the register list.
---
src/target/arm7_9_common.c | 17 ++++++++++++++---
1 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index 2b064f2..07090ad 100644
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -2231,11 +2231,22 @@ int arm7_9_write_core_reg(struct target_s *target, int
num, enum armv4_5_mode mo
arm7_9->write_xpsr_im8(target, tmp_cpsr & 0xff, 0, 0);
}
+
if ((num >= 0) && (num <= 15))
{
- /* write a normal core register */
- reg[num] = value;
-
+ int j;
+
+ /* update the core_cache */
+ *(uint32_t*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode,
num).value = value;
+
+ /* build register list from core_cache */
+ /* to pass to write_core_regs */
+ for (j = 0; j < 15; j++)
+ {
+ reg[j] =
*(uint32_t*)ARMV4_5_CORE_REG_MODE(armv4_5->core_cache, mode, j).value;
+ }
+
+ /* write the reg list to the CPU */
arm7_9->write_core_regs(target, 1 << num, reg);
}
else
--
1.5.6.5
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