Hi all, I wanted to check on something. I've got my AT91SAM9260 reading from a NAND flash device and I wanted to make sure the configuration interface wasn't too ridiculous. Here is the current set of commands to properly configure an Olimex SAM9-L9260 board for flashing (the code to initialize the peripherals to talk to NAND is ommitted and is just a set of mww in the reset-init script).
nand device at91sam9 at91sam9260.cpu 0x40000000 ;# create controller with NAND data address at 0x40000000 at91sam9 cle 0 22 ;# address line 22 is the command latch enable line at91sam9 ale 0 21 ;# address line 21 is the address latch enable line at91sam9 rdy_busy 0 0xfffff800 13 ;# ready/~busy input comes from pin 13 of PIOC at91sam9 ce 0 0xfffff800 14 ;# chip enable output connected at pin 14 of PIOC Does this seem reasonable? Would this work for the majority of SAM9s out there? // Dean Glazeski
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